[llvm] [SCEV] Handle backedge-count logic for std::reverse like loops (PR #92560)

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mrdaybird wrote:

@efriedma-quic Currently we are checking if the RHSStride<0, but alive2 shows that only requirement is that the strides should not be equal to each other. (https://alive2.llvm.org/ce/z/vPvwri). Should I trust it and incorporate the same in the code?
(Also, I know that tests are failing; due a stupid mistake by me.)

https://github.com/llvm/llvm-project/pull/92560