[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via llvm-commits]

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@@ -57999,13 +58020,25 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
     case 'q':   // GENERAL_REGS in 64-bit mode, Q_REGS in 32-bit mode.
       if (Subtarget.is64Bit()) {
         if (VT == MVT::i8 || VT == MVT::i1)
-          return std::make_pair(0U, &X86::GR8_NOREX2RegClass);
+          return std::make_pair(0U, Subtarget.hasEGPR() &&
+                                            Subtarget.useInlineAsmGPR32()
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FreddyLeaf wrote:

[e752556](https://github.com/llvm/llvm-project/pull/92338/commits/e752556c06ac25d905c6e642bdcb5e9244db5da3)

https://github.com/llvm/llvm-project/pull/92338