[llvm] [InstCombine] Simplify further when shift is half bitwidth (PR #93677)

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``````````bash
git-clang-format --diff 3082258d3a29664a66fcd35c104a40b8cf9d6cba 728eac99dcf78de7969fddb3e5a8f56345e680fc -- llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 266ccf9d19..38731aa6ff 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -1717,12 +1717,12 @@ Instruction *InstCombinerImpl::visitAShr(BinaryOperator &I) {
         (BitWidth > 2 && (*MulC - 1).isPowerOf2() &&
          MulC->logBase2() == ShAmt &&
          (ShAmt < BitWidth - 1))) /* Minus 1 for the sign bit */ {
-        auto *NewAdd = BinaryOperator::CreateNSWAdd(
-            X, Builder.CreateAShr(X, ConstantInt::get(Ty, ShAmt), "",
-                                  I.isExact()));
-        NewAdd->setHasNoUnsignedWrap(
-            cast<OverflowingBinaryOperator>(Op0)->hasNoUnsignedWrap());
-        return NewAdd;
+      auto *NewAdd = BinaryOperator::CreateNSWAdd(
+          X,
+          Builder.CreateAShr(X, ConstantInt::get(Ty, ShAmt), "", I.isExact()));
+      NewAdd->setHasNoUnsignedWrap(
+          cast<OverflowingBinaryOperator>(Op0)->hasNoUnsignedWrap());
+      return NewAdd;
     }
   }
 

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https://github.com/llvm/llvm-project/pull/93677