[llvm] [AArch64] Optimize when storing symmetry constants (PR #93717)

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git-clang-format --diff 5e06050efdaa36bc63987b0e15c30b3cf358e70c 1dcab368b98a8af831f5a18a737d16ae1c3f101d -- llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index 9ae3aaebc1..ecb2e13a5b 100644
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -2279,8 +2279,8 @@ static bool isSymmetric(MachineInstr &MI, Register BaseReg) {
     return MatchBaseReg(2);
   case AArch64::ORRXrs:
     MachineOperand &Imm = MI.getOperand(3);
-    // Fourth operand of ORR must be 32 which mean 32bit symmetric constant load.
-    // ex) renamable $x8 = ORRXrs $x8, $x8, 32
+    // Fourth operand of ORR must be 32 which mean 32bit symmetric constant
+    // load. ex) renamable $x8 = ORRXrs $x8, $x8, 32
     if (MatchBaseReg(3) && Imm.isImm() && Imm.getImm() == 32)
       return true;
   }

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https://github.com/llvm/llvm-project/pull/93717