[llvm] [ARM64EC] Warn on using disallowed registers in assembly src. (PR #93618)
Daniel Paoliello via llvm-commits
llvm-commits at lists.llvm.org
Wed May 29 09:22:51 PDT 2024
================
@@ -5315,6 +5317,31 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc,
}
}
+ // On ARM64EC, only valid registers may be used. Warn against using
+ // explicitly disallowed registers.
+ if (IsWindowsArm64EC) {
+ for (unsigned i = 0; i < Inst.getNumOperands(); ++i) {
+ if (Inst.getOperand(i).isReg()) {
+ unsigned Reg = Inst.getOperand(i).getReg();
+ // At this point, vector registers are matched to their
+ // appropriately sized alias.
+ if ((Reg == AArch64::W13 || Reg == AArch64::X13) ||
+ (Reg == AArch64::W14 || Reg == AArch64::X14) ||
+ (Reg == AArch64::W23 || Reg == AArch64::X23) ||
+ (Reg == AArch64::W24 || Reg == AArch64::X24) ||
+ (Reg == AArch64::W28 || Reg == AArch64::X28) ||
+ (Reg >= AArch64::Q16 && Reg <= AArch64::Q31) ||
+ (Reg >= AArch64::D16 && Reg <= AArch64::D31) ||
+ (Reg >= AArch64::S16 && Reg <= AArch64::S31) ||
+ (Reg >= AArch64::H16 && Reg <= AArch64::H31) ||
+ (Reg >= AArch64::B16 && Reg <= AArch64::B31)) {
+ Warning(IDLoc, "this instruction uses disallowed registers.");
----------------
dpaoliello wrote:
Can you please add the register that is disallowed to the error message? I would also like the message to mention Arm64EC to suggest why it is disallowed.
https://github.com/llvm/llvm-project/pull/93618
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