[llvm] [ARM64EC] Warn on using disallowed registers in assembly src. (PR #93618)

[Namish Kukreja via llvm-commits]

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@@ -0,0 +1,75 @@
+// RUN: llvm-mc -triple arm64ec-pc-windows-msvc < %s 2> %t.log
+// RUN: FileCheck %s --check-prefix=CHECK-ERR < %t.log
+
+
+// ---- disallowed x registers ----
+orr x13, x0, x1             // x13
+// CHECK-ERR: warning: this instruction uses disallowed registers.
+orr x14, x2, x3             // x14
+// CHECK-ERR: warning: this instruction uses disallowed registers.
+orr x4, x23, x5             // x23
+// CHECK-ERR: warning: this instruction uses disallowed registers.
+orr x6, x7, x24             // x24
+// CHECK-ERR: warning: this instruction uses disallowed registers.
+orr x28, x8, x9             // x28
+// CHECK-ERR: warning: this instruction uses disallowed registers.
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namikukr wrote:

The idea for this testcase was that each line uses one disallowed register and generates a warning. I can include another testcase that uses allowed registers only (and I'll also check for no warnings when assembled for regular AArch64 on this testcase). 

https://github.com/llvm/llvm-project/pull/93618