[llvm] [GISel] LegalizationArtifactCombiner: Elide redundant G_SEXT_INREG (PR #93687)

[Matt Arsenault via llvm-commits]

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@@ -211,7 +212,14 @@ class LegalizationArtifactCombiner {
       uint64_t SizeInBits = SrcTy.getScalarSizeInBits();
       if (DstTy != MRI.getType(TruncSrc))
         TruncSrc = Builder.buildAnyExtOrTrunc(DstTy, TruncSrc).getReg(0);
-      Builder.buildSExtInReg(DstReg, TruncSrc, SizeInBits);
+      // Elide G_SEXT_INREG if possible. This is similar to eliding G_AND in
+      // tryCombineZExt. Refer to the comment in tryCombineZExt for rationale.
+      if (KB && KB->computeNumSignBits(TruncSrc) >=
+                    DstTy.getScalarSizeInBits() - SizeInBits + 1)
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arsenm wrote:

x >= y + 1 -> x > y? 

https://github.com/llvm/llvm-project/pull/93687