[llvm] [ARM64EC] Warn on using disallowed registers in assembly src. (PR #93618)

[Martin Storsjö via llvm-commits]

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@@ -0,0 +1,75 @@
+// RUN: llvm-mc -triple arm64ec-pc-windows-msvc < %s 2> %t.log
+// RUN: FileCheck %s --check-prefix=CHECK-ERR < %t.log
+
+
+// ---- disallowed x registers ----
+orr x13, x0, x1             // x13
+// CHECK-ERR: warning: this instruction uses disallowed registers.
+orr x14, x2, x3             // x14
+// CHECK-ERR: warning: this instruction uses disallowed registers.
+orr x4, x23, x5             // x23
+// CHECK-ERR: warning: this instruction uses disallowed registers.
+orr x6, x7, x24             // x24
+// CHECK-ERR: warning: this instruction uses disallowed registers.
+orr x28, x8, x9             // x28
+// CHECK-ERR: warning: this instruction uses disallowed registers.
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mstorsjo wrote:

With a test sequence like this, it's kinda hard to keep track of which instruction maps to which error. I was kind of wanting to have some separate instruction here which would not trigger the warning as well, but it's not very easy to verify that. Or perhaps we should have a separate test file which only uses allowed registers, and validate that it produces no warnings? (And also maybe as another test aspect - test that this file produces no warnings when assembled as regular `aarch64-windows-msvc`.)

https://github.com/llvm/llvm-project/pull/93618