[llvm] a9e8a3a - [X86][CodeGen] Extend X86CompressEVEX for NF transform
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Wed May 29 00:43:08 PDT 2024
Author: Shengchen Kan
Date: 2024-05-29T15:41:31+08:00
New Revision: a9e8a3a18eb897196f88d3705ccd966f5b52c012
URL: https://github.com/llvm/llvm-project/commit/a9e8a3a18eb897196f88d3705ccd966f5b52c012
DIFF: https://github.com/llvm/llvm-project/commit/a9e8a3a18eb897196f88d3705ccd966f5b52c012.diff
LOG: [X86][CodeGen] Extend X86CompressEVEX for NF transform
Added:
Modified:
llvm/lib/Target/X86/X86CompressEVEX.cpp
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86InstrInfo.h
llvm/test/CodeGen/X86/apx/add.ll
llvm/test/CodeGen/X86/apx/and.ll
llvm/test/CodeGen/X86/apx/compress-evex.mir
llvm/test/CodeGen/X86/apx/dec.ll
llvm/test/CodeGen/X86/apx/imul.ll
llvm/test/CodeGen/X86/apx/inc.ll
llvm/test/CodeGen/X86/apx/neg.ll
llvm/test/CodeGen/X86/apx/or.ll
llvm/test/CodeGen/X86/apx/shl.ll
llvm/test/CodeGen/X86/apx/shr.ll
llvm/test/CodeGen/X86/apx/sub.ll
llvm/test/CodeGen/X86/apx/xor.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86CompressEVEX.cpp b/llvm/lib/Target/X86/X86CompressEVEX.cpp
index 6442cc2193308..cadfda93d4b19 100644
--- a/llvm/lib/Target/X86/X86CompressEVEX.cpp
+++ b/llvm/lib/Target/X86/X86CompressEVEX.cpp
@@ -14,6 +14,7 @@
// b. Promoted instruction (EVEX) -> pre-promotion instruction (legacy/VEX)
// c. NDD (EVEX) -> non-NDD (legacy)
// d. NF_ND (EVEX) -> NF (EVEX)
+// e. NonNF (EVEX) -> NF (EVEX)
//
// Compression a, b and c can always reduce code size, with some exceptions
// such as promoted 16-bit CRC32 which is as long as the legacy version.
@@ -30,6 +31,9 @@
//
// Compression d can help hardware decode (HW may skip reading the NDD
// register) although the instruction length remains unchanged.
+//
+// Compression e can help hardware skip updating EFLAGS although the instruction
+// length remains unchanged.
//===----------------------------------------------------------------------===//
#include "MCTargetDesc/X86BaseInfo.h"
@@ -219,25 +223,36 @@ static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
return false;
// MOVBE*rr is special because it has semantic of NDD but not set EVEX_B.
bool IsNDLike = IsND || Opc == X86::MOVBE32rr || Opc == X86::MOVBE64rr;
- if (IsNDLike && !isRedundantNewDataDest(MI, ST))
+ bool IsRedundantNDD = IsNDLike ? isRedundantNewDataDest(MI, ST) : false;
+ // NonNF -> NF only if it's not a compressible NDD instruction and eflags is
+ // dead.
+ unsigned NFOpc = (ST.hasNF() && !IsRedundantNDD &&
+ MI.registerDefIsDead(X86::EFLAGS, /*TRI=*/nullptr))
+ ? X86::getNFVariant(Opc)
+ : 0U;
+ if (IsNDLike && !IsRedundantNDD && !NFOpc)
return false;
- ArrayRef<X86TableEntry> Table = ArrayRef(X86CompressEVEXTable);
-
- Opc = MI.getOpcode();
- const auto *I = llvm::lower_bound(Table, Opc);
- if (I == Table.end() || I->OldOpc != Opc) {
- assert(!IsNDLike && "Missing entry for ND-like instruction");
- return false;
- }
+ unsigned NewOpc = NFOpc;
+ if (!NewOpc) {
+ ArrayRef<X86TableEntry> Table = ArrayRef(X86CompressEVEXTable);
- if (!IsNDLike) {
- if (usesExtendedRegister(MI) || !checkPredicate(I->NewOpc, &ST) ||
- !performCustomAdjustments(MI, I->NewOpc))
+ Opc = MI.getOpcode();
+ const auto I = llvm::lower_bound(Table, Opc);
+ if (I == Table.end() || I->OldOpc != Opc) {
+ assert(!IsNDLike && "Missing entry for ND-like instruction");
return false;
+ }
+
+ if (!IsNDLike) {
+ if (usesExtendedRegister(MI) || !checkPredicate(I->NewOpc, &ST) ||
+ !performCustomAdjustments(MI, I->NewOpc))
+ return false;
+ }
+ NewOpc = I->NewOpc;
}
- const MCInstrDesc &NewDesc = ST.getInstrInfo()->get(I->NewOpc);
+ const MCInstrDesc &NewDesc = ST.getInstrInfo()->get(NewOpc);
MI.setDesc(NewDesc);
unsigned AsmComment;
switch (NewDesc.TSFlags & X86II::EncodingMask) {
@@ -256,7 +271,7 @@ static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
llvm_unreachable("Unknown EVEX compression");
}
MI.setAsmPrinterFlag(AsmComment);
- if (IsNDLike)
+ if (IsRedundantNDD)
MI.tieOperands(0, 1);
return true;
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 7d05f950b6fe9..3e391da807889 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -3221,6 +3221,14 @@ int X86::getCCMPCondFlagsFromCondCode(X86::CondCode CC) {
}
}
+#define GET_X86_NF_TRANSFORM_TABLE
+#include "X86GenInstrMapping.inc"
+unsigned X86::getNFVariant(unsigned Opc) {
+ ArrayRef<X86TableEntry> Table = ArrayRef(X86NFTransformTable);
+ const auto I = llvm::lower_bound(Table, Opc);
+ return (I == Table.end() || I->OldOpc != Opc) ? 0U : I->NewOpc;
+}
+
/// Return the inverse of the specified condition,
/// e.g. turning COND_E to COND_NE.
X86::CondCode X86::GetOppositeBranchCondition(X86::CondCode CC) {
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 295fac60c6e40..9eb2bd56b2ab5 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -77,6 +77,9 @@ CondCode getCondFromCCMP(const MachineInstr &MI);
// Turn condition code into condition flags for CCMP/CTEST.
int getCCMPCondFlagsFromCondCode(CondCode CC);
+// Get the opcode of corresponding NF variant.
+unsigned getNFVariant(unsigned Opc);
+
/// GetOppositeBranchCondition - Return the inverse of the specified cond,
/// e.g. turning COND_E to COND_NE.
CondCode GetOppositeBranchCondition(CondCode CC);
diff --git a/llvm/test/CodeGen/X86/apx/add.ll b/llvm/test/CodeGen/X86/apx/add.ll
index d3301ecdb72d0..7779ae599f200 100644
--- a/llvm/test/CodeGen/X86/apx/add.ll
+++ b/llvm/test/CodeGen/X86/apx/add.ll
@@ -1,11 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @add8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: add8rr:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x00,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add8rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addb %sil, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x00,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i8 %a, %b
ret i8 %add
@@ -17,6 +23,12 @@ define i16 @add16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-NEXT: addl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0xf7]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x01,0xf7]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i16 %a, %b
ret i16 %add
@@ -27,6 +39,11 @@ define i32 @add32rr(i32 noundef %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x01,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i32 %a, %b
ret i32 %add
@@ -37,6 +54,11 @@ define i64 @add64rr(i64 noundef %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x01,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addq %rsi, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x01,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i64 %a, %b
ret i64 %add
@@ -47,6 +69,11 @@ define i8 @add8rm(i8 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x02,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add8rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addb (%rsi), %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x02,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%b = load i8, ptr %ptr
%add = add i8 %a, %b
@@ -58,6 +85,11 @@ define i16 @add16rm(i16 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x03,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addw (%rsi), %di, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x03,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%b = load i16, ptr %ptr
%add = add i16 %a, %b
@@ -69,6 +101,11 @@ define i32 @add32rm(i32 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x03,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl (%rsi), %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x03,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%b = load i32, ptr %ptr
%add = add i32 %a, %b
@@ -80,6 +117,11 @@ define i64 @add64rm(i64 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x03,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addq (%rsi), %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x03,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%b = load i64, ptr %ptr
%add = add i64 %a, %b
@@ -92,6 +134,12 @@ define i16 @add16ri8(i16 noundef %a) {
; CHECK-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xc7,0x7b]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i16 %a, 123
ret i16 %add
@@ -102,6 +150,11 @@ define i32 @add32ri8(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xc7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i32 %a, 123
ret i32 %add
@@ -112,6 +165,11 @@ define i64 @add64ri8(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addq $123, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x83,0xc7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i64 %a, 123
ret i64 %add
@@ -122,6 +180,11 @@ define i8 @add8ri(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xc7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addb $123, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0xc7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i8 %a, 123
ret i8 %add
@@ -134,6 +197,13 @@ define i16 @add16ri(i16 noundef %a) {
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $1234, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xc7,0xd2,0x04,0x00,0x00]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i16 %a, 1234
ret i16 %add
@@ -145,6 +215,12 @@ define i32 @add32ri(i32 noundef %a) {
; CHECK-NEXT: addl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $123456, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xc7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i32 %a, 123456
ret i32 %add
@@ -156,6 +232,12 @@ define i64 @add64ri(i64 noundef %a) {
; CHECK-NEXT: addq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addq $123456, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0xc7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = add i64 %a, 123456
ret i64 %add
@@ -166,6 +248,11 @@ define i8 @add8mr(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x00,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add8mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addb %sil, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x00,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%add = add nsw i8 %t, %b
@@ -177,6 +264,11 @@ define i16 @add16mr(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x01,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addw %si, (%rdi), %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x01,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%add = add nsw i16 %t, %b
@@ -188,6 +280,11 @@ define i32 @add32mr(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl %esi, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x01,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%add = add nsw i32 %t, %b
@@ -199,6 +296,11 @@ define i64 @add64mr(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x01,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addq %rsi, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x01,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%add = add nsw i64 %t, %b
@@ -212,6 +314,13 @@ define i16 @add16mi8(ptr %a) {
; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%add = add nsw i16 %t, 123
@@ -223,6 +332,11 @@ define i32 @add32mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x07,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $123, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0x07,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%add = add nsw i32 %t, 123
@@ -234,6 +348,11 @@ define i64 @add64mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x07,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addq $123, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x83,0x07,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%add = add nsw i64 %t, 123
@@ -245,6 +364,11 @@ define i8 @add8mi(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x07,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add8mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addb $123, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0x07,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%add = add nsw i8 %t, 123
@@ -259,6 +383,14 @@ define i16 @add16mi(ptr %a) {
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%add = add nsw i16 %t, 1234
@@ -271,6 +403,12 @@ define i32 @add32mi(ptr %a) {
; CHECK-NEXT: addl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x07,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $123456, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0x07,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%add = add nsw i32 %t, 123456
@@ -283,6 +421,12 @@ define i64 @add64mi(ptr %a) {
; CHECK-NEXT: addq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x07,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addq $123456, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0x07,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%add = add nsw i64 %t, 123456
@@ -303,6 +447,15 @@ define i8 @addflag8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag8rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x00,0xf7]
+; NF-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; NF-NEXT: movl $255, %ecx # encoding: [0xb9,0xff,0x00,0x00,0x00]
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i8 @llvm.uadd.sat.i8(i8 %a, i8 %b)
ret i8 %add
@@ -317,6 +470,15 @@ define i16 @addflag16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x01,0xf7]
+; NF-NEXT: movl $65535, %ecx # encoding: [0xb9,0xff,0xff,0x00,0x00]
+; NF-NEXT: # imm = 0xFFFF
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i16 @llvm.uadd.sat.i16(i16 %a, i16 %b)
ret i16 %add
@@ -329,6 +491,13 @@ define i32 @addflag32rr(i32 noundef %a, i32 noundef %b) {
; CHECK-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0xf7]
+; NF-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 %b)
ret i32 %add
@@ -341,6 +510,13 @@ define i64 @addflag64rr(i64 noundef %a, i64 noundef %b) {
; CHECK-NEXT: movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x01,0xf7]
+; NF-NEXT: movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
+; NF-NEXT: cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 %b)
ret i64 %add
@@ -355,6 +531,15 @@ define i8 @addflag8rm(i8 noundef %a, ptr %b) {
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag8rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x02,0x3e]
+; NF-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; NF-NEXT: movl $255, %ecx # encoding: [0xb9,0xff,0x00,0x00,0x00]
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i8, ptr %b
%add = call i8 @llvm.uadd.sat.i8(i8 %a, i8 %t)
@@ -370,6 +555,15 @@ define i16 @addflag16rm(i16 noundef %a, ptr %b) {
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x03,0x3e]
+; NF-NEXT: movl $65535, %ecx # encoding: [0xb9,0xff,0xff,0x00,0x00]
+; NF-NEXT: # imm = 0xFFFF
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i16, ptr %b
%add = call i16 @llvm.uadd.sat.i16(i16 %a, i16 %t)
@@ -383,6 +577,13 @@ define i32 @addflag32rm(i32 noundef %a, ptr %b) {
; CHECK-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x03,0x3e]
+; NF-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i32, ptr %b
%add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 %t)
@@ -396,6 +597,13 @@ define i64 @addflag64rm(i64 noundef %a, ptr %b) {
; CHECK-NEXT: movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x03,0x3e]
+; NF-NEXT: movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
+; NF-NEXT: cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i64, ptr %b
%add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 %t)
@@ -411,6 +619,15 @@ define i16 @addflag16ri8(i16 noundef %a) {
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag16ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xc7,0x7b]
+; NF-NEXT: movl $65535, %ecx # encoding: [0xb9,0xff,0xff,0x00,0x00]
+; NF-NEXT: # imm = 0xFFFF
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i16 @llvm.uadd.sat.i16(i16 %a, i16 123)
ret i16 %add
@@ -423,6 +640,13 @@ define i32 @addflag32ri8(i32 noundef %a) {
; CHECK-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag32ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x7b]
+; NF-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 123)
ret i32 %add
@@ -435,6 +659,13 @@ define i64 @addflag64ri8(i64 noundef %a) {
; CHECK-NEXT: movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag64ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xc7,0x7b]
+; NF-NEXT: movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
+; NF-NEXT: cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 123)
ret i64 %add
@@ -449,6 +680,15 @@ define i8 @addflag8ri(i8 noundef %a) {
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xc7,0x7b]
+; NF-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; NF-NEXT: movl $255, %ecx # encoding: [0xb9,0xff,0x00,0x00,0x00]
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i8 @llvm.uadd.sat.i8(i8 %a, i8 123)
ret i8 %add
@@ -464,6 +704,16 @@ define i16 @addflag16ri(i16 noundef %a) {
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addw $1234, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xc7,0xd2,0x04]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: movl $65535, %ecx # encoding: [0xb9,0xff,0xff,0x00,0x00]
+; NF-NEXT: # imm = 0xFFFF
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i16 @llvm.uadd.sat.i16(i16 %a, i16 1234)
ret i16 %add
@@ -477,6 +727,14 @@ define i32 @addflag32ri(i32 noundef %a) {
; CHECK-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; NF-NEXT: cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 123456)
ret i32 %add
@@ -490,6 +748,14 @@ define i64 @addflag64ri(i64 noundef %a) {
; CHECK-NEXT: movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: addflag64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
+; NF-NEXT: cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 123456)
ret i64 %add
@@ -507,6 +773,16 @@ define i1 @add64ri_reloc(i16 %k) {
; CHECK-NEXT: # fixup A - offset: 2, value: val, kind: reloc_signed_4byte
; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64ri_reloc:
+; NF: # %bb.0:
+; NF-NEXT: # kill: def $edi killed $edi def $rdi
+; NF-NEXT: movswq %di, %rax # encoding: [0x48,0x0f,0xbf,0xc7]
+; NF-NEXT: addq %rax, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x01,0xc0]
+; NF-NEXT: addq $val, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: val, kind: reloc_signed_4byte
+; NF-NEXT: setne %al # encoding: [0x0f,0x95,0xc0]
+; NF-NEXT: retq # encoding: [0xc3]
%g = getelementptr inbounds i16, ptr @val, i16 %k
%cmp = icmp ne ptr %g, null
ret i1 %cmp
@@ -517,6 +793,11 @@ define void @add8mr_legacy(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb %sil, (%rdi) # encoding: [0x40,0x00,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add8mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addb %sil, (%rdi) # encoding: [0x40,0x00,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%add = add i8 %t, %b
@@ -529,6 +810,11 @@ define void @add16mr_legacy(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addw %si, (%rdi) # encoding: [0x66,0x01,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addw %si, (%rdi) # encoding: [0x66,0x01,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%add = add i16 %t, %b
@@ -541,6 +827,11 @@ define void @add32mr_legacy(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addl %esi, (%rdi) # encoding: [0x01,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addl %esi, (%rdi) # encoding: [0x01,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%add = add i32 %t, %b
@@ -553,6 +844,11 @@ define void @add64mr_legacy(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addq %rsi, (%rdi) # encoding: [0x48,0x01,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addq %rsi, (%rdi) # encoding: [0x48,0x01,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%add = add i64 %t, %b
@@ -565,6 +861,11 @@ define void @add8mi_legacy(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb $123, (%rdi) # encoding: [0x80,0x07,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add8mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addb $123, (%rdi) # encoding: [0x80,0x07,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%add = add nsw i8 %t, 123
@@ -578,6 +879,12 @@ define void @add16mi_legacy(ptr %a) {
; CHECK-NEXT: addw $1234, (%rdi) # encoding: [0x66,0x81,0x07,0xd2,0x04]
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add16mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addw $1234, (%rdi) # encoding: [0x66,0x81,0x07,0xd2,0x04]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%add = add nsw i16 %t, 1234
@@ -591,6 +898,12 @@ define void @add32mi_legacy(ptr %a) {
; CHECK-NEXT: addl $123456, (%rdi) # encoding: [0x81,0x07,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add32mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addl $123456, (%rdi) # encoding: [0x81,0x07,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%add = add nsw i32 %t, 123456
@@ -604,6 +917,12 @@ define void @add64mi_legacy(ptr %a) {
; CHECK-NEXT: addq $123456, (%rdi) # encoding: [0x48,0x81,0x07,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: add64mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addq $123456, (%rdi) # encoding: [0x48,0x81,0x07,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%add = add nsw i64 %t, 123456
diff --git a/llvm/test/CodeGen/X86/apx/and.ll b/llvm/test/CodeGen/X86/apx/and.ll
index af8f4119ac054..58f54fbe50a52 100644
--- a/llvm/test/CodeGen/X86/apx/and.ll
+++ b/llvm/test/CodeGen/X86/apx/and.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @and8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: and8rr:
@@ -7,6 +8,12 @@ define i8 @and8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-NEXT: andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and8rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x21,0xf7]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i8 %a, %b
ret i8 %and
@@ -18,6 +25,12 @@ define i16 @and16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-NEXT: andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x21,0xf7]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i16 %a, %b
ret i16 %and
@@ -28,6 +41,11 @@ define i32 @and32rr(i32 noundef %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x21,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i32 %a, %b
ret i32 %and
@@ -38,6 +56,11 @@ define i64 @and64rr(i64 noundef %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x21,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andq %rsi, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x21,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i64 %a, %b
ret i64 %and
@@ -48,6 +71,11 @@ define i8 @and8rm(i8 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x22,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and8rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andb (%rsi), %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x22,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i8, ptr %b
%and = and i8 %a, %t
@@ -59,6 +87,11 @@ define i16 @and16rm(i16 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x23,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andw (%rsi), %di, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x23,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i16, ptr %b
%and = and i16 %a, %t
@@ -70,6 +103,11 @@ define i32 @and32rm(i32 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x23,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl (%rsi), %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x23,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i32, ptr %b
%and = and i32 %a, %t
@@ -81,6 +119,11 @@ define i64 @and64rm(i64 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x23,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andq (%rsi), %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x23,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i64, ptr %b
%and = and i64 %a, %t
@@ -93,6 +136,12 @@ define i16 @and16ri8(i16 noundef %a) {
; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xe7,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xe7,0x7b]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i16 %a, 123
ret i16 %and
@@ -103,6 +152,11 @@ define i32 @and32ri8(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xe7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xe7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i32 %a, 123
ret i32 %and
@@ -113,6 +167,11 @@ define i64 @and64ri8(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xe7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xe7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i64 %a, 123
ret i64 %and
@@ -123,6 +182,11 @@ define i8 @and8ri(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xe7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andb $123, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0xe7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i8 %a, 123
ret i8 %and
@@ -135,6 +199,13 @@ define i16 @and16ri(i16 noundef %a) {
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl $1234, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xe7,0xd2,0x04,0x00,0x00]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i16 %a, 1234
ret i16 %and
@@ -146,6 +217,12 @@ define i32 @and32ri(i32 noundef %a) {
; CHECK-NEXT: andl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl $123456, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xe7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i32 %a, 123456
ret i32 %and
@@ -157,6 +234,12 @@ define i64 @and64ri(i64 noundef %a) {
; CHECK-NEXT: andl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl $123456, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xe7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%and = and i64 %a, 123456
ret i64 %and
@@ -167,6 +250,11 @@ define i8 @and8mr(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x20,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and8mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andb %sil, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x20,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%and = and i8 %t, %b
@@ -178,6 +266,11 @@ define i16 @and16mr(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x21,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andw %si, (%rdi), %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x21,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%and = and i16 %t, %b
@@ -189,6 +282,11 @@ define i32 @and32mr(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl %esi, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x21,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%and = and i32 %t, %b
@@ -200,6 +298,11 @@ define i64 @and64mr(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x21,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andq %rsi, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x21,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%and = and i64 %t, %b
@@ -213,6 +316,13 @@ define i16 @and16mi8(ptr %a) {
; CHECK-NEXT: andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%and = and i16 %t, 123
@@ -224,6 +334,11 @@ define i32 @and32mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x27,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl $123, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0x27,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%and = and i32 %t, 123
@@ -236,6 +351,12 @@ define i64 @and64mi8(ptr %a) {
; CHECK-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
; CHECK-NEXT: andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
+; NF-NEXT: andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%and = and i64 %t, 123
@@ -247,6 +368,11 @@ define i8 @and8mi(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x27,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and8mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andb $123, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0x27,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%and = and i8 %t, 123
@@ -261,6 +387,14 @@ define i16 @and16mi(ptr %a) {
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: andl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x25,0xd2,0x04,0x00,0x00]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%and = and i16 %t, 1234
@@ -273,6 +407,12 @@ define i32 @and32mi(ptr %a) {
; CHECK-NEXT: andl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x27,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} andl $123456, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0x27,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%and = and i32 %t, 123456
@@ -286,6 +426,13 @@ define i64 @and64mi(ptr %a) {
; CHECK-NEXT: andl $123456, %eax # EVEX TO LEGACY Compression encoding: [0x25,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
+; NF-NEXT: andl $123456, %eax # EVEX TO LEGACY Compression encoding: [0x25,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%and = and i64 %t, 123456
@@ -303,6 +450,15 @@ define i1 @andflag8rr(i8 %a, i8 %b) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag8rr:
+; NF: # %bb.0:
+; NF-NEXT: notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
+; NF-NEXT: andb %al, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x20,0xc7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i8 %b, -1
%v0 = and i8 %a, %xor ; 0xff << 50
%v1 = icmp eq i8 %v0, 0
@@ -319,6 +475,15 @@ define i1 @andflag16rr(i16 %a, i16 %b) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag16rr:
+; NF: # %bb.0:
+; NF-NEXT: notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6]
+; NF-NEXT: andw %ax, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x21,0xc7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 %b, -1
%v0 = and i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -334,6 +499,14 @@ define i1 @andflag32rr(i32 %a, i32 %b) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag32rr:
+; NF: # %bb.0:
+; NF-NEXT: andl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x21,0xf7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = and i32 %a, %b ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -348,6 +521,14 @@ define i1 @andflag64rr(i64 %a, i64 %b) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag64rr:
+; NF: # %bb.0:
+; NF-NEXT: andq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x21,0xf7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = and i64 %a, %b ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -363,6 +544,15 @@ define i1 @andflag8rm(ptr %ptr, i8 %b) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag8rm:
+; NF: # %bb.0:
+; NF-NEXT: notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
+; NF-NEXT: andb (%rdi), %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x22,0x07]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i8, ptr %ptr
%xor = xor i8 %b, -1
%v0 = and i8 %a, %xor ; 0xff << 50
@@ -380,6 +570,15 @@ define i1 @andflag16rm(ptr %ptr, i16 %b) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag16rm:
+; NF: # %bb.0:
+; NF-NEXT: notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6]
+; NF-NEXT: andw (%rdi), %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x23,0x07]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i16, ptr %ptr
%xor = xor i16 %b, -1
%v0 = and i16 %a, %xor ; 0xff << 50
@@ -396,6 +595,14 @@ define i1 @andflag32rm(ptr %ptr, i32 %b) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag32rm:
+; NF: # %bb.0:
+; NF-NEXT: andl (%rdi), %esi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x23,0x37]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i32, ptr %ptr
%v0 = and i32 %a, %b ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
@@ -411,6 +618,14 @@ define i1 @andflag64rm(ptr %ptr, i64 %b) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag64rm:
+; NF: # %bb.0:
+; NF-NEXT: andq (%rdi), %rsi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x23,0x37]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i64, ptr %ptr
%v0 = and i64 %a, %b ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
@@ -426,6 +641,14 @@ define i1 @andflag8ri(i8 %a) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag8ri:
+; NF: # %bb.0:
+; NF-NEXT: andb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xe7,0x84]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i8 123, -1
%v0 = and i8 %a, %xor ; 0xff << 50
%v1 = icmp eq i8 %v0, 0
@@ -442,6 +665,15 @@ define i1 @andflag16ri(i16 %a) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag16ri:
+; NF: # %bb.0:
+; NF-NEXT: andw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xe7,0x2d,0xfb]
+; NF-NEXT: # imm = 0xFB2D
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 1234, -1
%v0 = and i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -458,6 +690,15 @@ define i1 @andflag32ri(i32 %a) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag32ri:
+; NF: # %bb.0:
+; NF-NEXT: andl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = and i32 %a, 123456 ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -473,6 +714,15 @@ define i1 @andflag64ri(i64 %a) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag64ri:
+; NF: # %bb.0:
+; NF-NEXT: andq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = and i64 %a, 123456 ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -487,6 +737,14 @@ define i1 @andflag16ri8(i16 %a) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag16ri8:
+; NF: # %bb.0:
+; NF-NEXT: andw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xe7,0x84]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 123, -1
%v0 = and i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -502,6 +760,14 @@ define i1 @andflag32ri8(i32 %a) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag32ri8:
+; NF: # %bb.0:
+; NF-NEXT: andl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xe7,0x7b]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = and i32 %a, 123 ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -516,6 +782,14 @@ define i1 @andflag64ri8(i64 %a) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: andflag64ri8:
+; NF: # %bb.0:
+; NF-NEXT: andq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xe7,0x7b]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = and i64 %a, 123 ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -527,6 +801,11 @@ define void @and8mr_legacy(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andb %sil, (%rdi) # encoding: [0x40,0x20,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and8mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: andb %sil, (%rdi) # encoding: [0x40,0x20,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%and = and i8 %t, %b
@@ -539,6 +818,11 @@ define void @and16mr_legacy(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andw %si, (%rdi) # encoding: [0x66,0x21,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: andw %si, (%rdi) # encoding: [0x66,0x21,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%and = and i16 %t, %b
@@ -551,6 +835,11 @@ define void @and32mr_legacy(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl %esi, (%rdi) # encoding: [0x21,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: andl %esi, (%rdi) # encoding: [0x21,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%and = and i32 %t, %b
@@ -563,6 +852,11 @@ define void @and64mr_legacy(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq %rsi, (%rdi) # encoding: [0x48,0x21,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: andq %rsi, (%rdi) # encoding: [0x48,0x21,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%and = and i64 %t, %b
@@ -575,6 +869,11 @@ define void @and8mi_legacy(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andb $123, (%rdi) # encoding: [0x80,0x27,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and8mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: andb $123, (%rdi) # encoding: [0x80,0x27,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%and = and i8 %t, 123
@@ -588,6 +887,12 @@ define void @and16mi_legacy(ptr %a) {
; CHECK-NEXT: andw $1234, (%rdi) # encoding: [0x66,0x81,0x27,0xd2,0x04]
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and16mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: andw $1234, (%rdi) # encoding: [0x66,0x81,0x27,0xd2,0x04]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%and = and i16 %t, 1234
@@ -601,6 +906,12 @@ define void @and32mi_legacy(ptr %a) {
; CHECK-NEXT: andl $123456, (%rdi) # encoding: [0x81,0x27,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and32mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: andl $123456, (%rdi) # encoding: [0x81,0x27,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%and = and i32 %t, 123456
@@ -614,6 +925,12 @@ define void @and64mi_legacy(ptr %a) {
; CHECK-NEXT: andq $123456, (%rdi) # encoding: [0x48,0x81,0x27,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: and64mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: andq $123456, (%rdi) # encoding: [0x48,0x81,0x27,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%and = and i64 %t, 123456
diff --git a/llvm/test/CodeGen/X86/apx/compress-evex.mir b/llvm/test/CodeGen/X86/apx/compress-evex.mir
index d8bef886e234f..626904a7a692c 100644
--- a/llvm/test/CodeGen/X86/apx/compress-evex.mir
+++ b/llvm/test/CodeGen/X86/apx/compress-evex.mir
@@ -1,4 +1,5 @@
-# RUN: llc %s -mtriple=x86_64-unknown -mattr=+ndd,+egpr -start-before=x86-compress-evex -show-mc-encoding -o - | FileCheck %s
+# RUN: llc %s -mtriple=x86_64-unknown -mattr=+ndd,+egpr -start-before=x86-compress-evex -show-mc-encoding -o - | FileCheck --check-prefixes=CHECK,NDD %s
+# RUN: llc %s -mtriple=x86_64-unknown -mattr=+ndd,+egpr,+nf -start-before=x86-compress-evex -show-mc-encoding -o - | FileCheck --check-prefixes=CHECK,NDD-NF %s
...
---
@@ -46,7 +47,8 @@ name: ndd_2_non_ndd_incommutable
body: |
bb.0.entry:
liveins: $rdi, $rsi
- ; CHECK: subq %rax, %rsi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xc6]
+ ; NDD: subq %rax, %rsi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xc6]
+ ; NDD-NF: {nf} subq %rax, %rsi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x29,0xc6]
renamable $rax = ADD64rr_ND killed renamable $rdi, renamable $rsi, implicit-def dead $eflags
renamable $rax = SUB64rr_ND killed renamable $rsi, killed renamable $rax, implicit-def dead $eflags
RET64 $rax
@@ -55,7 +57,8 @@ body: |
name: ndd_2_non_ndd_mem
body: |
bb.0.entry:
- ; CHECK: addq $123456, (%rax), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x00,0x40,0xe2,0x01,0x00]
+ ; NDD: addq $123456, (%rax), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x00,0x40,0xe2,0x01,0x00]
+ ; NDD-NF: {nf} addq $123456, (%rax), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0x00,0x40,0xe2,0x01,0x00]
renamable $rax = MOV64rm $noreg, 1, $noreg, 0, $fs
renamable $rax = nsw ADD64mi32_ND killed renamable $rax, 1, $noreg, 0, $noreg, 123456, implicit-def dead $eflags
RET64 $rax
@@ -88,5 +91,20 @@ body: |
; CHECK: bswapq %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0xc8]
renamable $rax = MOVBE64rr killed renamable $rax
RET64 killed $rax
-
+...
+---
+name: non_nf_2_nf
+body: |
+ bb.0.entry:
+ liveins: $rdi, $r16
+ ; CHECK: addq %r16, %rdi # encoding: [0xd5,0x48,0x01,0xc7]
+ ; NDD: xorq %r16, %rdi, %rax # encoding: [0x62,0xe4,0xfc,0x18,0x31,0xc7]
+ ; NDD-NF: {nf} xorq %r16, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xe4,0xfc,0x1c,0x31,0xc7]
+ ; CHECK: addq %r16, %rax, %rdi # encoding: [0x62,0xe4,0xc4,0x18,0x01,0xc0]
+ ; CHECK: adcq %rdi, %r16, %rax # encoding: [0x62,0xfc,0xfc,0x18,0x11,0xf8]
+ $rdi = ADD64rr $rdi, $r16, implicit-def dead $eflags
+ $rax = XOR64rr_ND $rdi, $r16, implicit-def dead $eflags
+ $rdi = ADD64rr_ND $rax, $r16, implicit-def $eflags
+ $rax = ADC64rr_ND $r16, $rdi, implicit-def dead $eflags, implicit $eflags
+ RET64 $rax
...
diff --git a/llvm/test/CodeGen/X86/apx/dec.ll b/llvm/test/CodeGen/X86/apx/dec.ll
index fcb2cae3b5cad..a18ed2ace603a 100644
--- a/llvm/test/CodeGen/X86/apx/dec.ll
+++ b/llvm/test/CodeGen/X86/apx/dec.ll
@@ -1,11 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
define i8 @dec8r(i8 noundef %a) {
; CHECK-LABEL: dec8r:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decb %dil, %al
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec8r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} decb %dil, %al
+; NF-NEXT: retq
entry:
%dec = sub i8 %a, 1
ret i8 %dec
@@ -17,6 +23,12 @@ define i16 @dec16r(i16 noundef %a) {
; CHECK-NEXT: decl %edi, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec16r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} decl %edi, %eax
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq
entry:
%dec = sub i16 %a, 1
ret i16 %dec
@@ -27,6 +39,11 @@ define i32 @dec32r(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decl %edi, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec32r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} decl %edi, %eax
+; NF-NEXT: retq
entry:
%dec = sub i32 %a, 1
ret i32 %dec
@@ -37,6 +54,11 @@ define i64 @dec64r(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decq %rdi, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec64r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} decq %rdi, %rax
+; NF-NEXT: retq
entry:
%dec = sub i64 %a, 1
ret i64 %dec
@@ -47,6 +69,11 @@ define i8 @dec8m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decb (%rdi), %al
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec8m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} decb (%rdi), %al
+; NF-NEXT: retq
entry:
%a = load i8, ptr %ptr
%dec = sub i8 %a, 1
@@ -60,6 +87,13 @@ define i16 @dec16m(ptr %ptr) {
; CHECK-NEXT: decl %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec16m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax
+; NF-NEXT: decl %eax
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq
entry:
%a = load i16, ptr %ptr
%dec = sub i16 %a, 1
@@ -71,6 +105,11 @@ define i32 @dec32m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decl (%rdi), %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec32m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} decl (%rdi), %eax
+; NF-NEXT: retq
entry:
%a = load i32, ptr %ptr
%dec = sub i32 %a, 1
@@ -82,6 +121,11 @@ define i64 @dec64m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decq (%rdi), %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec64m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} decq (%rdi), %rax
+; NF-NEXT: retq
entry:
%a = load i64, ptr %ptr
%dec = sub i64 %a, 1
@@ -93,6 +137,11 @@ define void @dec8m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decb (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec8m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: decb (%rdi)
+; NF-NEXT: retq
entry:
%a = load i8, ptr %ptr
%dec = sub i8 %a, 1
@@ -105,6 +154,11 @@ define void @dec16m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decw (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec16m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: decw (%rdi)
+; NF-NEXT: retq
entry:
%a = load i16, ptr %ptr
%dec = sub i16 %a, 1
@@ -117,6 +171,11 @@ define void @dec32m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decl (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec32m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: decl (%rdi)
+; NF-NEXT: retq
entry:
%a = load i32, ptr %ptr
%dec = sub i32 %a, 1
@@ -129,6 +188,11 @@ define void @dec64m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: decq (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: dec64m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: decq (%rdi)
+; NF-NEXT: retq
entry:
%a = load i64, ptr %ptr
%dec = sub i64 %a, 1
diff --git a/llvm/test/CodeGen/X86/apx/imul.ll b/llvm/test/CodeGen/X86/apx/imul.ll
index 2963a6477be4c..d97b2c0baec5e 100644
--- a/llvm/test/CodeGen/X86/apx/imul.ll
+++ b/llvm/test/CodeGen/X86/apx/imul.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
define i16 @mul16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-LABEL: mul16rr:
@@ -7,6 +8,12 @@ define i16 @mul16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-NEXT: imull %esi, %edi, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: mul16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imull %esi, %edi, %eax
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq
entry:
%mul = mul i16 %a, %b
ret i16 %mul
@@ -17,6 +24,11 @@ define i32 @mul32rr(i32 noundef %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imull %esi, %edi, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: mul32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imull %esi, %edi, %eax
+; NF-NEXT: retq
entry:
%mul = mul i32 %a, %b
ret i32 %mul
@@ -27,6 +39,11 @@ define i64 @mul64rr(i64 noundef %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imulq %rsi, %rdi, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: mul64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imulq %rsi, %rdi, %rax
+; NF-NEXT: retq
entry:
%mul = mul i64 %a, %b
ret i64 %mul
@@ -37,6 +54,11 @@ define i16 @smul16rr(i16 noundef %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imulw %si, %di, %ax
; CHECK-NEXT: retq
+;
+; NF-LABEL: smul16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imulw %si, %di, %ax
+; NF-NEXT: retq
entry:
%t = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
%mul = extractvalue {i16, i1} %t, 0
@@ -48,6 +70,11 @@ define i32 @smul32rr(i32 noundef %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imull %esi, %edi, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: smul32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imull %esi, %edi, %eax
+; NF-NEXT: retq
entry:
%t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
%mul = extractvalue {i32, i1} %t, 0
@@ -59,6 +86,11 @@ define i64 @smul64rr(i64 noundef %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imulq %rsi, %rdi, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: smul64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imulq %rsi, %rdi, %rax
+; NF-NEXT: retq
entry:
%t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %a, i64 %b)
%mul = extractvalue {i64, i1} %t, 0
@@ -70,6 +102,11 @@ define i16 @mul16rm(i16 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imulw (%rsi), %di, %ax
; CHECK-NEXT: retq
+;
+; NF-LABEL: mul16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imulw (%rsi), %di, %ax
+; NF-NEXT: retq
entry:
%b = load i16, ptr %ptr
%mul = mul i16 %a, %b
@@ -81,6 +118,11 @@ define i32 @mul32rm(i32 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imull (%rsi), %edi, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: mul32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imull (%rsi), %edi, %eax
+; NF-NEXT: retq
entry:
%b = load i32, ptr %ptr
%mul = mul i32 %a, %b
@@ -92,6 +134,11 @@ define i64 @mul64rm(i64 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imulq (%rsi), %rdi, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: mul64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imulq (%rsi), %rdi, %rax
+; NF-NEXT: retq
entry:
%b = load i64, ptr %ptr
%mul = mul i64 %a, %b
@@ -103,6 +150,11 @@ define i16 @smul16rm(i16 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imulw (%rsi), %di, %ax
; CHECK-NEXT: retq
+;
+; NF-LABEL: smul16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imulw (%rsi), %di, %ax
+; NF-NEXT: retq
entry:
%b = load i16, ptr %ptr
%t = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b)
@@ -115,6 +167,11 @@ define i32 @smul32rm(i32 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imull (%rsi), %edi, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: smul32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imull (%rsi), %edi, %eax
+; NF-NEXT: retq
entry:
%b = load i32, ptr %ptr
%t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b)
@@ -127,6 +184,11 @@ define i64 @smul64rm(i64 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: imulq (%rsi), %rdi, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: smul64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} imulq (%rsi), %rdi, %rax
+; NF-NEXT: retq
entry:
%b = load i64, ptr %ptr
%t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %a, i64 %b)
diff --git a/llvm/test/CodeGen/X86/apx/inc.ll b/llvm/test/CodeGen/X86/apx/inc.ll
index a9c6d740cf2ce..8d31badb99779 100644
--- a/llvm/test/CodeGen/X86/apx/inc.ll
+++ b/llvm/test/CodeGen/X86/apx/inc.ll
@@ -1,11 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
define i8 @inc8r(i8 noundef %a) {
; CHECK-LABEL: inc8r:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incb %dil, %al
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc8r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} incb %dil, %al
+; NF-NEXT: retq
entry:
%inc = add i8 %a, 1
ret i8 %inc
@@ -17,6 +23,12 @@ define i16 @inc16r(i16 noundef %a) {
; CHECK-NEXT: incl %edi, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc16r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} incl %edi, %eax
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq
entry:
%inc = add i16 %a, 1
ret i16 %inc
@@ -27,6 +39,11 @@ define i32 @inc32r(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incl %edi, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc32r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} incl %edi, %eax
+; NF-NEXT: retq
entry:
%inc = add i32 %a, 1
ret i32 %inc
@@ -37,6 +54,11 @@ define i64 @inc64r(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incq %rdi, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc64r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} incq %rdi, %rax
+; NF-NEXT: retq
entry:
%inc = add i64 %a, 1
ret i64 %inc
@@ -47,6 +69,11 @@ define i8 @inc8m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incb (%rdi), %al
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc8m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} incb (%rdi), %al
+; NF-NEXT: retq
entry:
%a = load i8, ptr %ptr
%inc = add i8 %a, 1
@@ -60,6 +87,13 @@ define i16 @inc16m(ptr %ptr) {
; CHECK-NEXT: incl %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc16m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax
+; NF-NEXT: incl %eax
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq
entry:
%a = load i16, ptr %ptr
%inc = add i16 %a, 1
@@ -71,6 +105,11 @@ define i32 @inc32m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incl (%rdi), %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc32m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} incl (%rdi), %eax
+; NF-NEXT: retq
entry:
%a = load i32, ptr %ptr
%inc = add i32 %a, 1
@@ -82,6 +121,11 @@ define i64 @inc64m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incq (%rdi), %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc64m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} incq (%rdi), %rax
+; NF-NEXT: retq
entry:
%a = load i64, ptr %ptr
%inc = add i64 %a, 1
@@ -97,6 +141,15 @@ define i8 @uinc8r(i8 noundef %a) {
; CHECK-NEXT: cmovel %ecx, %eax
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uinc8r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: incb %dil, %al
+; NF-NEXT: movzbl %al, %eax
+; NF-NEXT: movl $255, %ecx
+; NF-NEXT: cmovel %ecx, %eax
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq
entry:
%inc = call i8 @llvm.uadd.sat.i8(i8 %a, i8 1)
ret i8 %inc
@@ -110,6 +163,14 @@ define i16 @uinc16r(i16 noundef %a) {
; CHECK-NEXT: cmovel %ecx, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uinc16r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: incw %di, %ax
+; NF-NEXT: movl $65535, %ecx # imm = 0xFFFF
+; NF-NEXT: cmovel %ecx, %eax
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq
entry:
%inc = call i16 @llvm.uadd.sat.i16(i16 %a, i16 1)
ret i16 %inc
@@ -122,6 +183,13 @@ define i32 @uinc32r(i32 noundef %a) {
; CHECK-NEXT: movl $-1, %ecx
; CHECK-NEXT: cmovel %ecx, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uinc32r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: incl %edi, %eax
+; NF-NEXT: movl $-1, %ecx
+; NF-NEXT: cmovel %ecx, %eax
+; NF-NEXT: retq
entry:
%inc = call i32 @llvm.uadd.sat.i32(i32 %a, i32 1)
ret i32 %inc
@@ -134,6 +202,13 @@ define i64 @uinc64r(i64 noundef %a) {
; CHECK-NEXT: movq $-1, %rcx
; CHECK-NEXT: cmoveq %rcx, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uinc64r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: incq %rdi, %rax
+; NF-NEXT: movq $-1, %rcx
+; NF-NEXT: cmoveq %rcx, %rax
+; NF-NEXT: retq
entry:
%inc = call i64 @llvm.uadd.sat.i64(i64 %a, i64 1)
ret i64 %inc
@@ -149,6 +224,11 @@ define void @inc8m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incb (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc8m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: incb (%rdi)
+; NF-NEXT: retq
entry:
%a = load i8, ptr %ptr
%inc = add i8 %a, 1
@@ -161,6 +241,11 @@ define void @inc16m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incw (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc16m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: incw (%rdi)
+; NF-NEXT: retq
entry:
%a = load i16, ptr %ptr
%inc = add i16 %a, 1
@@ -173,6 +258,11 @@ define void @inc32m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incl (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc32m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: incl (%rdi)
+; NF-NEXT: retq
entry:
%a = load i32, ptr %ptr
%inc = add i32 %a, 1
@@ -185,6 +275,11 @@ define void @inc64m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: incq (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: inc64m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: incq (%rdi)
+; NF-NEXT: retq
entry:
%a = load i64, ptr %ptr
%inc = add i64 %a, 1
diff --git a/llvm/test/CodeGen/X86/apx/neg.ll b/llvm/test/CodeGen/X86/apx/neg.ll
index c1c53fbdaebd8..5e033e33cb8b2 100644
--- a/llvm/test/CodeGen/X86/apx/neg.ll
+++ b/llvm/test/CodeGen/X86/apx/neg.ll
@@ -1,11 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
define i8 @neg8r(i8 noundef %a) {
; CHECK-LABEL: neg8r:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negb %dil, %al
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg8r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negb %dil, %al
+; NF-NEXT: retq
entry:
%neg = sub i8 0, %a
ret i8 %neg
@@ -17,6 +23,12 @@ define i16 @neg16r(i16 noundef %a) {
; CHECK-NEXT: negl %edi, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg16r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negl %edi, %eax
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq
entry:
%neg = sub i16 0, %a
ret i16 %neg
@@ -27,6 +39,11 @@ define i32 @neg32r(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negl %edi, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg32r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negl %edi, %eax
+; NF-NEXT: retq
entry:
%neg = sub i32 0, %a
ret i32 %neg
@@ -37,6 +54,11 @@ define i64 @neg64r(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negq %rdi, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg64r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negq %rdi, %rax
+; NF-NEXT: retq
entry:
%neg = sub i64 0, %a
ret i64 %neg
@@ -47,6 +69,11 @@ define i8 @neg8m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negb (%rdi), %al
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg8m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negb (%rdi), %al
+; NF-NEXT: retq
entry:
%a = load i8, ptr %ptr
%neg = sub i8 0, %a
@@ -58,6 +85,11 @@ define i16 @neg16m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negw (%rdi), %ax
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg16m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negw (%rdi), %ax
+; NF-NEXT: retq
entry:
%a = load i16, ptr %ptr
%neg = sub i16 0, %a
@@ -69,6 +101,11 @@ define i32 @neg32m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negl (%rdi), %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg32m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negl (%rdi), %eax
+; NF-NEXT: retq
entry:
%a = load i32, ptr %ptr
%neg = sub i32 0, %a
@@ -80,6 +117,11 @@ define i64 @neg64m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negq (%rdi), %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg64m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negq (%rdi), %rax
+; NF-NEXT: retq
entry:
%a = load i64, ptr %ptr
%neg = sub i64 0, %a
@@ -91,6 +133,11 @@ define i8 @uneg8r(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negb %dil, %al
; CHECK-NEXT: retq
+;
+; NF-LABEL: uneg8r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negb %dil, %al
+; NF-NEXT: retq
entry:
%t = call {i8, i1} @llvm.usub.with.overflow.i8(i8 0, i8 %a)
%neg = extractvalue {i8, i1} %t, 0
@@ -103,6 +150,12 @@ define i16 @uneg16r(i16 noundef %a) {
; CHECK-NEXT: negl %edi, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uneg16r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negl %edi, %eax
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq
entry:
%t = call {i16, i1} @llvm.usub.with.overflow.i16(i16 0, i16 %a)
%neg = extractvalue {i16, i1} %t, 0
@@ -114,6 +167,11 @@ define i32 @uneg32r(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negl %edi, %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uneg32r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negl %edi, %eax
+; NF-NEXT: retq
entry:
%t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 0, i32 %a)
%neg = extractvalue {i32, i1} %t, 0
@@ -125,6 +183,11 @@ define i64 @uneg64r(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negq %rdi, %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uneg64r:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negq %rdi, %rax
+; NF-NEXT: retq
entry:
%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 0, i64 %a)
%neg = extractvalue {i64, i1} %t, 0
@@ -136,6 +199,11 @@ define i8 @uneg8m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negb (%rdi), %al
; CHECK-NEXT: retq
+;
+; NF-LABEL: uneg8m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negb (%rdi), %al
+; NF-NEXT: retq
entry:
%a = load i8, ptr %ptr
%t = call {i8, i1} @llvm.usub.with.overflow.i8(i8 0, i8 %a)
@@ -148,6 +216,11 @@ define i16 @uneg16m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negw (%rdi), %ax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uneg16m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negw (%rdi), %ax
+; NF-NEXT: retq
entry:
%a = load i16, ptr %ptr
%t = call {i16, i1} @llvm.usub.with.overflow.i16(i16 0, i16 %a)
@@ -160,6 +233,11 @@ define i32 @uneg32m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negl (%rdi), %eax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uneg32m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negl (%rdi), %eax
+; NF-NEXT: retq
entry:
%a = load i32, ptr %ptr
%t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 0, i32 %a)
@@ -172,6 +250,11 @@ define i64 @uneg64m(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negq (%rdi), %rax
; CHECK-NEXT: retq
+;
+; NF-LABEL: uneg64m:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} negq (%rdi), %rax
+; NF-NEXT: retq
entry:
%a = load i64, ptr %ptr
%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 0, i64 %a)
@@ -189,6 +272,11 @@ define void @neg8m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negb (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg8m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: negb (%rdi)
+; NF-NEXT: retq
entry:
%a = load i8, ptr %ptr
%neg = sub i8 0, %a
@@ -201,6 +289,11 @@ define void @neg16m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negw (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg16m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: negw (%rdi)
+; NF-NEXT: retq
entry:
%a = load i16, ptr %ptr
%neg = sub i16 0, %a
@@ -213,6 +306,11 @@ define void @neg32m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negl (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg32m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: negl (%rdi)
+; NF-NEXT: retq
entry:
%a = load i32, ptr %ptr
%neg = sub i32 0, %a
@@ -225,6 +323,11 @@ define void @neg64m_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: negq (%rdi)
; CHECK-NEXT: retq
+;
+; NF-LABEL: neg64m_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: negq (%rdi)
+; NF-NEXT: retq
entry:
%a = load i64, ptr %ptr
%neg = sub i64 0, %a
diff --git a/llvm/test/CodeGen/X86/apx/or.ll b/llvm/test/CodeGen/X86/apx/or.ll
index 3d024e962400f..d404279e14f7a 100644
--- a/llvm/test/CodeGen/X86/apx/or.ll
+++ b/llvm/test/CodeGen/X86/apx/or.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @or8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: or8rr:
@@ -7,6 +8,12 @@ define i8 @or8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-NEXT: orl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x09,0xf7]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or8rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x09,0xf7]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i8 %a, %b
ret i8 %or
@@ -18,6 +25,12 @@ define i16 @or16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-NEXT: orl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x09,0xf7]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x09,0xf7]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i16 %a, %b
ret i16 %or
@@ -28,6 +41,11 @@ define i32 @or32rr(i32 noundef %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x09,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x09,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i32 %a, %b
ret i32 %or
@@ -38,6 +56,11 @@ define i64 @or64rr(i64 noundef %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x09,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orq %rsi, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x09,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i64 %a, %b
ret i64 %or
@@ -48,6 +71,11 @@ define i8 @or8rm(i8 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x0a,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or8rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orb (%rsi), %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x0a,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i8, ptr %b
%or = or i8 %a, %t
@@ -59,6 +87,11 @@ define i16 @or16rm(i16 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x0b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orw (%rsi), %di, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x0b,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i16, ptr %b
%or = or i16 %a, %t
@@ -70,6 +103,11 @@ define i32 @or32rm(i32 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x0b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl (%rsi), %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x0b,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i32, ptr %b
%or = or i32 %a, %t
@@ -81,6 +119,11 @@ define i64 @or64rm(i64 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x0b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orq (%rsi), %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x0b,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i64, ptr %b
%or = or i64 %a, %t
@@ -93,6 +136,12 @@ define i16 @or16ri8(i16 noundef %a) {
; CHECK-NEXT: orl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xcf,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xcf,0x7b]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i16 %a, 123
ret i16 %or
@@ -103,6 +152,11 @@ define i32 @or32ri8(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xcf,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xcf,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i32 %a, 123
ret i32 %or
@@ -113,6 +167,11 @@ define i64 @or64ri8(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xcf,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orq $123, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x83,0xcf,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i64 %a, 123
ret i64 %or
@@ -123,6 +182,11 @@ define i8 @or8ri(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xcf,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orb $123, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0xcf,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i8 %a, 123
ret i8 %or
@@ -135,6 +199,13 @@ define i16 @or16ri(i16 noundef %a) {
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl $1234, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xcf,0xd2,0x04,0x00,0x00]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i16 %a, 1234
ret i16 %or
@@ -146,6 +217,12 @@ define i32 @or32ri(i32 noundef %a) {
; CHECK-NEXT: orl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xcf,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl $123456, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xcf,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i32 %a, 123456
ret i32 %or
@@ -157,6 +234,12 @@ define i64 @or64ri(i64 noundef %a) {
; CHECK-NEXT: orq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xcf,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orq $123456, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0xcf,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%or = or i64 %a, 123456
ret i64 %or
@@ -167,6 +250,11 @@ define i8 @or8mr(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x08,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or8mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orb %sil, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x08,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%or = or i8 %t, %b
@@ -178,6 +266,11 @@ define i16 @or16mr(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x09,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orw %si, (%rdi), %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x09,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%or = or i16 %t, %b
@@ -189,6 +282,11 @@ define i32 @or32mr(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x09,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl %esi, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x09,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%or = or i32 %t, %b
@@ -200,6 +298,11 @@ define i64 @or64mr(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x09,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orq %rsi, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x09,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%or = or i64 %t, %b
@@ -213,6 +316,13 @@ define i16 @or16mi8(ptr %a) {
; CHECK-NEXT: orl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc8,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: orl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc8,0x7b]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%or = or i16 %t, 123
@@ -224,6 +334,11 @@ define i32 @or32mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x0f,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl $123, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0x0f,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%or = or i32 %t, 123
@@ -235,6 +350,11 @@ define i64 @or64mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x0f,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orq $123, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x83,0x0f,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%or = or i64 %t, 123
@@ -246,6 +366,11 @@ define i8 @or8mi(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x0f,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or8mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orb $123, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0x0f,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%or = or i8 %t, 123
@@ -260,6 +385,14 @@ define i16 @or16mi(ptr %a) {
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: orl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x0d,0xd2,0x04,0x00,0x00]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%or = or i16 %t, 1234
@@ -272,6 +405,12 @@ define i32 @or32mi(ptr %a) {
; CHECK-NEXT: orl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x0f,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orl $123456, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0x0f,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%or = or i32 %t, 123456
@@ -284,6 +423,12 @@ define i64 @or64mi(ptr %a) {
; CHECK-NEXT: orq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x0f,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} orq $123456, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0x0f,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%or = or i64 %t, 123456
@@ -301,6 +446,15 @@ define i1 @orflag8rr(i8 %a, i8 %b) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag8rr:
+; NF: # %bb.0:
+; NF-NEXT: notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
+; NF-NEXT: orb %al, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x08,0xc7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i8 %b, -1
%v0 = or i8 %a, %xor ; 0xff << 50
%v1 = icmp eq i8 %v0, 0
@@ -317,6 +471,15 @@ define i1 @orflag16rr(i16 %a, i16 %b) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag16rr:
+; NF: # %bb.0:
+; NF-NEXT: notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6]
+; NF-NEXT: orw %ax, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x09,0xc7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 %b, -1
%v0 = or i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -332,6 +495,14 @@ define i1 @orflag32rr(i32 %a, i32 %b) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag32rr:
+; NF: # %bb.0:
+; NF-NEXT: orl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x09,0xf7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = or i32 %a, %b ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -346,6 +517,14 @@ define i1 @orflag64rr(i64 %a, i64 %b) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag64rr:
+; NF: # %bb.0:
+; NF-NEXT: orq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x09,0xf7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = or i64 %a, %b ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -361,6 +540,15 @@ define i1 @orflag8rm(ptr %ptr, i8 %b) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag8rm:
+; NF: # %bb.0:
+; NF-NEXT: notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
+; NF-NEXT: orb (%rdi), %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x0a,0x07]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i8, ptr %ptr
%xor = xor i8 %b, -1
%v0 = or i8 %a, %xor ; 0xff << 50
@@ -378,6 +566,15 @@ define i1 @orflag16rm(ptr %ptr, i16 %b) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag16rm:
+; NF: # %bb.0:
+; NF-NEXT: notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6]
+; NF-NEXT: orw (%rdi), %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x0b,0x07]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i16, ptr %ptr
%xor = xor i16 %b, -1
%v0 = or i16 %a, %xor ; 0xff << 50
@@ -394,6 +591,14 @@ define i1 @orflag32rm(ptr %ptr, i32 %b) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag32rm:
+; NF: # %bb.0:
+; NF-NEXT: orl (%rdi), %esi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x0b,0x37]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i32, ptr %ptr
%v0 = or i32 %a, %b ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
@@ -409,6 +614,14 @@ define i1 @orflag64rm(ptr %ptr, i64 %b) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag64rm:
+; NF: # %bb.0:
+; NF-NEXT: orq (%rdi), %rsi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x0b,0x37]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i64, ptr %ptr
%v0 = or i64 %a, %b ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
@@ -424,6 +637,14 @@ define i1 @orflag8ri(i8 %a) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag8ri:
+; NF: # %bb.0:
+; NF-NEXT: orb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xcf,0x84]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i8 123, -1
%v0 = or i8 %a, %xor ; 0xff << 50
%v1 = icmp eq i8 %v0, 0
@@ -440,6 +661,15 @@ define i1 @orflag16ri(i16 %a) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag16ri:
+; NF: # %bb.0:
+; NF-NEXT: orw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xcf,0x2d,0xfb]
+; NF-NEXT: # imm = 0xFB2D
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 1234, -1
%v0 = or i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -456,6 +686,15 @@ define i1 @orflag32ri(i32 %a) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag32ri:
+; NF: # %bb.0:
+; NF-NEXT: orl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xcf,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = or i32 %a, 123456 ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -471,6 +710,15 @@ define i1 @orflag64ri(i64 %a) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag64ri:
+; NF: # %bb.0:
+; NF-NEXT: orq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xcf,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = or i64 %a, 123456 ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -485,6 +733,14 @@ define i1 @orflag16ri8(i16 %a) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag16ri8:
+; NF: # %bb.0:
+; NF-NEXT: orw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xcf,0x84]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 123, -1
%v0 = or i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -500,6 +756,14 @@ define i1 @orflag32ri8(i32 %a) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag32ri8:
+; NF: # %bb.0:
+; NF-NEXT: orl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xcf,0x7b]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = or i32 %a, 123 ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -514,6 +778,14 @@ define i1 @orflag64ri8(i64 %a) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: orflag64ri8:
+; NF: # %bb.0:
+; NF-NEXT: orq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xcf,0x7b]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = or i64 %a, 123 ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -525,6 +797,11 @@ define void @or8mr_legacy(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orb %sil, (%rdi) # encoding: [0x40,0x08,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or8mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: orb %sil, (%rdi) # encoding: [0x40,0x08,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%or = or i8 %t, %b
@@ -537,6 +814,11 @@ define void @or16mr_legacy(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orw %si, (%rdi) # encoding: [0x66,0x09,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: orw %si, (%rdi) # encoding: [0x66,0x09,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%or = or i16 %t, %b
@@ -549,6 +831,11 @@ define void @or32mr_legacy(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orl %esi, (%rdi) # encoding: [0x09,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: orl %esi, (%rdi) # encoding: [0x09,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%or = or i32 %t, %b
@@ -561,6 +848,11 @@ define void @or64mr_legacy(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orq %rsi, (%rdi) # encoding: [0x48,0x09,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: orq %rsi, (%rdi) # encoding: [0x48,0x09,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%or = or i64 %t, %b
@@ -573,6 +865,11 @@ define void @or8mi_legacy(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: orb $123, (%rdi) # encoding: [0x80,0x0f,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or8mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: orb $123, (%rdi) # encoding: [0x80,0x0f,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%or = or i8 %t, 123
@@ -586,6 +883,12 @@ define void @or16mi_legacy(ptr %a) {
; CHECK-NEXT: orw $1234, (%rdi) # encoding: [0x66,0x81,0x0f,0xd2,0x04]
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or16mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: orw $1234, (%rdi) # encoding: [0x66,0x81,0x0f,0xd2,0x04]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%or = or i16 %t, 1234
@@ -599,6 +902,12 @@ define void @or32mi_legacy(ptr %a) {
; CHECK-NEXT: orl $123456, (%rdi) # encoding: [0x81,0x0f,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or32mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: orl $123456, (%rdi) # encoding: [0x81,0x0f,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%or = or i32 %t, 123456
@@ -612,6 +921,12 @@ define void @or64mi_legacy(ptr %a) {
; CHECK-NEXT: orq $123456, (%rdi) # encoding: [0x48,0x81,0x0f,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: or64mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: orq $123456, (%rdi) # encoding: [0x48,0x81,0x0f,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%or = or i64 %t, 123456
diff --git a/llvm/test/CodeGen/X86/apx/shl.ll b/llvm/test/CodeGen/X86/apx/shl.ll
index 869caf932ff92..35b6cb27254b2 100644
--- a/llvm/test/CodeGen/X86/apx/shl.ll
+++ b/llvm/test/CodeGen/X86/apx/shl.ll
@@ -1,11 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @shl8ri(i8 noundef %a) {
; CHECK-LABEL: shl8ri:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlb $4, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0xe7,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shlb $4, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc0,0xe7,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i8 %a, 4
ret i8 %shl
@@ -17,6 +23,12 @@ define i16 @shl16ri(i16 noundef %a) {
; CHECK-NEXT: shll $4, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0xe7,0x04]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shll $4, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc1,0xe7,0x04]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i16 %a, 4
ret i16 %shl
@@ -27,6 +39,11 @@ define i32 @shl32ri(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shll $4, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0xe7,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shll $4, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc1,0xe7,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i32 %a, 4
ret i32 %shl
@@ -37,6 +54,11 @@ define i64 @shl64ri(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlq $4, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xc1,0xe7,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shlq $4, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xc1,0xe7,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i64 %a, 4
ret i64 %shl
@@ -48,6 +70,12 @@ define i8 @shl8m1(ptr %ptr) {
; CHECK-NEXT: movzbl (%rdi), %eax # encoding: [0x0f,0xb6,0x07]
; CHECK-NEXT: addb %al, %al # EVEX TO LEGACY Compression encoding: [0x00,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8m1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzbl (%rdi), %eax # encoding: [0x0f,0xb6,0x07]
+; NF-NEXT: addb %al, %al # EVEX TO LEGACY Compression encoding: [0x00,0xc0]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shl = shl i8 %a, 1
@@ -61,6 +89,13 @@ define i16 @shl16m1(ptr %ptr) {
; CHECK-NEXT: addl %eax, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc0]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16m1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: addl %eax, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc0]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shl = shl i16 %a, 1
@@ -73,6 +108,12 @@ define i32 @shl32m1(ptr %ptr) {
; CHECK-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07]
; CHECK-NEXT: addl %eax, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32m1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07]
+; NF-NEXT: addl %eax, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc0]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shl = shl i32 %a, 1
@@ -85,6 +126,12 @@ define i64 @shl64m1(ptr %ptr) {
; CHECK-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
; CHECK-NEXT: addq %rax, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x01,0xc0]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64m1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
+; NF-NEXT: addq %rax, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x01,0xc0]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shl = shl i64 %a, 1
@@ -98,6 +145,13 @@ define i8 @shl8mcl(ptr %ptr, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlb %cl, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8mcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shlb %cl, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd2,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shl = shl i8 %a, %cl
@@ -111,6 +165,13 @@ define i8 @shl8mcl_mask(ptr %ptr, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlb %cl, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8mcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shlb %cl, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd2,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shamt = and i8 %cl, 31
@@ -127,6 +188,15 @@ define i16 @shl16mcl(ptr %ptr, i16 %cl) {
; CHECK-NEXT: shll %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe0]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16mcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shll %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe0]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shl = shl i16 %a, %cl
@@ -142,6 +212,15 @@ define i16 @shl16mcl_mask(ptr %ptr, i16 %cl) {
; CHECK-NEXT: shll %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe0]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16mcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shll %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe0]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shamt = and i16 %cl, 31
@@ -156,6 +235,13 @@ define i32 @shl32mcl(ptr %ptr, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32mcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shll %cl, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shl = shl i32 %a, %cl
@@ -169,6 +255,13 @@ define i32 @shl32mcl_mask(ptr %ptr, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32mcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shll %cl, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shamt = and i32 %cl, 31
@@ -183,6 +276,13 @@ define i64 @shl64mcl(ptr %ptr, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shlq %cl, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64mcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: {nf} shlq %cl, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd3,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shl = shl i64 %a, %cl
@@ -196,6 +296,13 @@ define i64 @shl64mcl_mask(ptr %ptr, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shlq %cl, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64mcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: {nf} shlq %cl, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd3,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shamt = and i64 %cl, 63
@@ -208,6 +315,11 @@ define i8 @shl8mi(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlb $4, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0x27,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shlb $4, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc0,0x27,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shl = shl i8 %a, 4
@@ -221,6 +333,13 @@ define i16 @shl16mi(ptr %ptr) {
; CHECK-NEXT: shll $4, %eax # EVEX TO LEGACY Compression encoding: [0xc1,0xe0,0x04]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: shll $4, %eax # EVEX TO LEGACY Compression encoding: [0xc1,0xe0,0x04]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shl = shl i16 %a, 4
@@ -232,6 +351,11 @@ define i32 @shl32mi(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shll $4, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0x27,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shll $4, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc1,0x27,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shl = shl i32 %a, 4
@@ -243,6 +367,11 @@ define i64 @shl64mi(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlq $4, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xc1,0x27,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shlq $4, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xc1,0x27,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shl = shl i64 %a, 4
@@ -254,6 +383,11 @@ define i8 @shl8r1(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb %dil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x00,0xff]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8r1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addb %dil, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x00,0xff]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i8 %a, 1
ret i8 %shl
@@ -265,6 +399,12 @@ define i16 @shl16r1(i16 noundef %a) {
; CHECK-NEXT: addl %edi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0xff]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16r1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl %edi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x01,0xff]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i16 %a, 1
ret i16 %shl
@@ -275,6 +415,11 @@ define i32 @shl32r1(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addl %edi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0xff]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32r1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl %edi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x01,0xff]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i32 %a, 1
ret i32 %shl
@@ -285,6 +430,11 @@ define i64 @shl64r1(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addq %rdi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x01,0xff]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64r1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addq %rdi, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x01,0xff]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i64 %a, 1
ret i64 %shl
@@ -297,6 +447,13 @@ define i8 @shl8rcl(i8 noundef %a, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlb %cl, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0xe7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8rcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shlb %cl, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd2,0xe7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i8 %a, %cl
ret i8 %shl
@@ -309,6 +466,13 @@ define i8 @shl8rcl_mask(i8 noundef %a, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlb %cl, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0xe7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8rcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shlb %cl, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd2,0xe7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shamt = and i8 %cl, 31
%shl = shl i8 %a, %shamt
@@ -323,6 +487,14 @@ define i16 @shl16rcl(i16 noundef %a, i16 %cl) {
; CHECK-NEXT: shll %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xe7]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16rcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shll %cl, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0xe7]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i16 %a, %cl
ret i16 %shl
@@ -336,6 +508,14 @@ define i16 @shl16rcl_mask(i16 noundef %a, i16 %cl) {
; CHECK-NEXT: shll %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xe7]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16rcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shll %cl, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0xe7]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shamt = and i16 %cl, 31
%shl = shl i16 %a, %shamt
@@ -349,6 +529,13 @@ define i32 @shl32rcl(i32 noundef %a, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xe7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32rcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shll %cl, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0xe7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i32 %a, %cl
ret i32 %shl
@@ -361,6 +548,13 @@ define i32 @shl32rcl_mask(i32 noundef %a, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xe7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32rcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shll %cl, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0xe7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shamt = and i32 %cl, 31
%shl = shl i32 %a, %shamt
@@ -374,6 +568,13 @@ define i64 @shl64rcl(i64 noundef %a, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shlq %cl, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0xe7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64rcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: {nf} shlq %cl, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd3,0xe7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shl = shl i64 %a, %cl
ret i64 %shl
@@ -386,6 +587,13 @@ define i64 @shl64rcl_mask(i64 noundef %a, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shlq %cl, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0xe7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64rcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: {nf} shlq %cl, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd3,0xe7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shamt = and i64 %cl, 63
%shl = shl i64 %a, %shamt
@@ -397,6 +605,11 @@ define void @shl8m1_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlb (%rdi) # encoding: [0xd0,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8m1_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shlb (%rdi) # encoding: [0xd0,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shl = shl i8 %a, 1
@@ -409,6 +622,11 @@ define void @shl16m1_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlw (%rdi) # encoding: [0x66,0xd1,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16m1_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shlw (%rdi) # encoding: [0x66,0xd1,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shl = shl i16 %a, 1
@@ -421,6 +639,11 @@ define void @shl32m1_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shll (%rdi) # encoding: [0xd1,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32m1_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shll (%rdi) # encoding: [0xd1,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shl = shl i32 %a, 1
@@ -433,6 +656,11 @@ define void @shl64m1_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlq (%rdi) # encoding: [0x48,0xd1,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64m1_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shlq (%rdi) # encoding: [0x48,0xd1,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shl = shl i64 %a, 1
@@ -445,6 +673,11 @@ define void @shl8mi_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlb $4, (%rdi) # encoding: [0xc0,0x27,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shlb $4, (%rdi) # encoding: [0xc0,0x27,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shl = shl i8 %a, 4
@@ -457,6 +690,11 @@ define void @shl16mi_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlw $4, (%rdi) # encoding: [0x66,0xc1,0x27,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shlw $4, (%rdi) # encoding: [0x66,0xc1,0x27,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shl = shl i16 %a, 4
@@ -469,6 +707,11 @@ define void @shl32mi_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shll $4, (%rdi) # encoding: [0xc1,0x27,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shll $4, (%rdi) # encoding: [0xc1,0x27,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shl = shl i32 %a, 4
@@ -481,6 +724,11 @@ define void @shl64mi_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shlq $4, (%rdi) # encoding: [0x48,0xc1,0x27,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shlq $4, (%rdi) # encoding: [0x48,0xc1,0x27,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shl = shl i64 %a, 4
@@ -495,6 +743,13 @@ define void @shl8mcl_legacy(ptr %ptr, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlb %cl, (%rdi) # encoding: [0xd2,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl8mcl_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shlb %cl, (%rdi) # encoding: [0xd2,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shl = shl i8 %a, %cl
@@ -509,6 +764,13 @@ define void @shl16mcl_legacy(ptr %ptr, i16 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shlw %cl, (%rdi) # encoding: [0x66,0xd3,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl16mcl_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shlw %cl, (%rdi) # encoding: [0x66,0xd3,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shl = shl i16 %a, %cl
@@ -523,6 +785,13 @@ define void @shl32mcl_legacy(ptr %ptr, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, (%rdi) # encoding: [0xd3,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl32mcl_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shll %cl, (%rdi) # encoding: [0xd3,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shl = shl i32 %a, %cl
@@ -537,6 +806,13 @@ define void @shl64mcl_legacy(ptr %ptr, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shlq %cl, (%rdi) # encoding: [0x48,0xd3,0x27]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shl64mcl_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: shlq %cl, (%rdi) # encoding: [0x48,0xd3,0x27]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shl = shl i64 %a, %cl
diff --git a/llvm/test/CodeGen/X86/apx/shr.ll b/llvm/test/CodeGen/X86/apx/shr.ll
index a7e02d8586f49..b5b91b02fedff 100644
--- a/llvm/test/CodeGen/X86/apx/shr.ll
+++ b/llvm/test/CodeGen/X86/apx/shr.ll
@@ -1,11 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @shr8m1(ptr %ptr) {
; CHECK-LABEL: shr8m1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrb (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd0,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8m1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrb (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd0,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shr = lshr i8 %a, 1
@@ -19,6 +25,13 @@ define i16 @shr16m1(ptr %ptr) {
; CHECK-NEXT: shrl %eax # EVEX TO LEGACY Compression encoding: [0xd1,0xe8]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16m1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: shrl %eax # EVEX TO LEGACY Compression encoding: [0xd1,0xe8]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shr = lshr i16 %a, 1
@@ -30,6 +43,11 @@ define i32 @shr32m1(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrl (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd1,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32m1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrl (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd1,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shr = lshr i32 %a, 1
@@ -41,6 +59,11 @@ define i64 @shr64m1(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrq (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd1,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64m1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrq (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd1,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shr = lshr i64 %a, 1
@@ -54,6 +77,13 @@ define i8 @shr8mcl(ptr %ptr, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrb %cl, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8mcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shrb %cl, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd2,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shr = lshr i8 %a, %cl
@@ -67,6 +97,13 @@ define i8 @shr8mcl_mask(ptr %ptr, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrb %cl, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8mcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shrb %cl, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd2,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shamt = and i8 %cl, 31
@@ -83,6 +120,15 @@ define i16 @shr16mcl(ptr %ptr, i16 %cl) {
; CHECK-NEXT: shrl %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe8]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16mcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shrl %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe8]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shr = lshr i16 %a, %cl
@@ -98,6 +144,15 @@ define i16 @shr16mcl_mask(ptr %ptr, i16 %cl) {
; CHECK-NEXT: shrl %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe8]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16mcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shrl %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe8]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shamt = and i16 %cl, 31
@@ -112,6 +167,13 @@ define i32 @shr32mcl(ptr %ptr, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrl %cl, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32mcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shrl %cl, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shr = lshr i32 %a, %cl
@@ -125,6 +187,13 @@ define i32 @shr32mcl_mask(ptr %ptr, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrl %cl, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32mcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shrl %cl, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shamt = and i32 %cl, 31
@@ -139,6 +208,13 @@ define i64 @shr64mcl(ptr %ptr, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shrq %cl, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64mcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: {nf} shrq %cl, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd3,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shr = lshr i64 %a, %cl
@@ -152,6 +228,13 @@ define i64 @shr64mcl_mask(ptr %ptr, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shrq %cl, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64mcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: {nf} shrq %cl, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd3,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shamt = and i64 %cl, 63
@@ -164,6 +247,11 @@ define i8 @shr8mi(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrb $4, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0x2f,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrb $4, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc0,0x2f,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shr = lshr i8 %a, 4
@@ -177,6 +265,13 @@ define i16 @shr16mi(ptr %ptr) {
; CHECK-NEXT: shrl $4, %eax # EVEX TO LEGACY Compression encoding: [0xc1,0xe8,0x04]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: shrl $4, %eax # EVEX TO LEGACY Compression encoding: [0xc1,0xe8,0x04]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shr = lshr i16 %a, 4
@@ -188,6 +283,11 @@ define i32 @shr32mi(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrl $4, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0x2f,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrl $4, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc1,0x2f,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shr = lshr i32 %a, 4
@@ -199,6 +299,11 @@ define i64 @shr64mi(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrq $4, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xc1,0x2f,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrq $4, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xc1,0x2f,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shr = lshr i64 %a, 4
@@ -210,6 +315,11 @@ define i8 @shr8r1(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrb %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd0,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8r1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrb %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd0,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i8 %a, 1
ret i8 %shr
@@ -222,6 +332,13 @@ define i16 @shr16r1(i16 noundef %a) {
; CHECK-NEXT: shrl %eax # EVEX TO LEGACY Compression encoding: [0xd1,0xe8]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16r1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl %di, %eax # encoding: [0x0f,0xb7,0xc7]
+; NF-NEXT: shrl %eax # EVEX TO LEGACY Compression encoding: [0xd1,0xe8]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i16 %a, 1
ret i16 %shr
@@ -232,6 +349,11 @@ define i32 @shr32r1(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrl %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd1,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32r1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrl %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd1,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i32 %a, 1
ret i32 %shr
@@ -242,6 +364,11 @@ define i64 @shr64r1(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrq %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd1,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64r1:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrq %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd1,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i64 %a, 1
ret i64 %shr
@@ -254,6 +381,13 @@ define i8 @shr8rcl(i8 noundef %a, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrb %cl, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8rcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shrb %cl, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd2,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i8 %a, %cl
ret i8 %shr
@@ -266,6 +400,13 @@ define i8 @shr8rcl_mask(i8 noundef %a, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrb %cl, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8rcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shrb %cl, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd2,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shamt = and i8 %cl, 31
%shr = lshr i8 %a, %shamt
@@ -281,6 +422,15 @@ define i16 @shr16rcl(i16 noundef %a, i16 %cl) {
; CHECK-NEXT: shrl %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe8]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16rcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: movzwl %di, %eax # encoding: [0x0f,0xb7,0xc7]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shrl %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe8]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i16 %a, %cl
ret i16 %shr
@@ -295,6 +445,15 @@ define i16 @shr16rcl_mask(i16 noundef %a, i16 %cl) {
; CHECK-NEXT: shrl %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe8]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16rcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: movzwl %di, %eax # encoding: [0x0f,0xb7,0xc7]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shrl %cl, %eax # EVEX TO LEGACY Compression encoding: [0xd3,0xe8]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shamt = and i16 %cl, 31
%shr = lshr i16 %a, %shamt
@@ -308,6 +467,13 @@ define i32 @shr32rcl(i32 noundef %a, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrl %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32rcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shrl %cl, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i32 %a, %cl
ret i32 %shr
@@ -320,6 +486,13 @@ define i32 @shr32rcl_mask(i32 noundef %a, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrl %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32rcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: {nf} shrl %cl, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xd3,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shamt = and i32 %cl, 31
%shr = lshr i32 %a, %shamt
@@ -333,6 +506,13 @@ define i64 @shr64rcl(i64 noundef %a, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shrq %cl, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64rcl:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: {nf} shrq %cl, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd3,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i64 %a, %cl
ret i64 %shr
@@ -345,6 +525,13 @@ define i64 @shr64rcl_mask(i64 noundef %a, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shrq %cl, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0xef]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64rcl_mask:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: {nf} shrq %cl, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xd3,0xef]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shamt = and i64 %cl, 63
%shr = lshr i64 %a, %shamt
@@ -356,6 +543,11 @@ define i8 @shr8ri(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrb $4, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0xef,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrb $4, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc0,0xef,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i8 %a, 4
ret i8 %shr
@@ -368,6 +560,13 @@ define i16 @shr16ri(i16 noundef %a) {
; CHECK-NEXT: shrl $4, %eax # EVEX TO LEGACY Compression encoding: [0xc1,0xe8,0x04]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl %di, %eax # encoding: [0x0f,0xb7,0xc7]
+; NF-NEXT: shrl $4, %eax # EVEX TO LEGACY Compression encoding: [0xc1,0xe8,0x04]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i16 %a, 4
ret i16 %shr
@@ -378,6 +577,11 @@ define i32 @shr32ri(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrl $4, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0xef,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrl $4, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0xc1,0xef,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i32 %a, 4
ret i32 %shr
@@ -388,6 +592,11 @@ define i64 @shr64ri(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrq $4, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xc1,0xef,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} shrq $4, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0xc1,0xef,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%shr = lshr i64 %a, 4
ret i64 %shr
@@ -398,6 +607,11 @@ define void @shr8m1_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrb (%rdi) # encoding: [0xd0,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8m1_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shrb (%rdi) # encoding: [0xd0,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shr = lshr i8 %a, 1
@@ -410,6 +624,11 @@ define void @shr16m1_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrw (%rdi) # encoding: [0x66,0xd1,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16m1_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shrw (%rdi) # encoding: [0x66,0xd1,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shr = lshr i16 %a, 1
@@ -422,6 +641,11 @@ define void @shr32m1_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrl (%rdi) # encoding: [0xd1,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32m1_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shrl (%rdi) # encoding: [0xd1,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shr = lshr i32 %a, 1
@@ -434,6 +658,11 @@ define void @shr64m1_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrq (%rdi) # encoding: [0x48,0xd1,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64m1_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shrq (%rdi) # encoding: [0x48,0xd1,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shr = lshr i64 %a, 1
@@ -446,6 +675,11 @@ define void @shr8mi_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrb $4, (%rdi) # encoding: [0xc0,0x2f,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shrb $4, (%rdi) # encoding: [0xc0,0x2f,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shr = lshr i8 %a, 4
@@ -458,6 +692,11 @@ define void @shr16mi_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrw $4, (%rdi) # encoding: [0x66,0xc1,0x2f,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shrw $4, (%rdi) # encoding: [0x66,0xc1,0x2f,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shr = lshr i16 %a, 4
@@ -470,6 +709,11 @@ define void @shr32mi_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrl $4, (%rdi) # encoding: [0xc1,0x2f,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shrl $4, (%rdi) # encoding: [0xc1,0x2f,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shr = lshr i32 %a, 4
@@ -482,6 +726,11 @@ define void @shr64mi_legacy(ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrq $4, (%rdi) # encoding: [0x48,0xc1,0x2f,0x04]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: shrq $4, (%rdi) # encoding: [0x48,0xc1,0x2f,0x04]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shr = lshr i64 %a, 4
@@ -496,6 +745,13 @@ define void @shr8mcl_legacy(ptr %ptr, i8 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrb %cl, (%rdi) # encoding: [0xd2,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr8mcl_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shrb %cl, (%rdi) # encoding: [0xd2,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i8, ptr %ptr
%shr = lshr i8 %a, %cl
@@ -510,6 +766,13 @@ define void @shr16mcl_legacy(ptr %ptr, i16 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrw %cl, (%rdi) # encoding: [0x66,0xd3,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr16mcl_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shrw %cl, (%rdi) # encoding: [0x66,0xd3,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i16, ptr %ptr
%shr = lshr i16 %a, %cl
@@ -524,6 +787,13 @@ define void @shr32mcl_legacy(ptr %ptr, i32 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrl %cl, (%rdi) # encoding: [0xd3,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr32mcl_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $ecx
+; NF-NEXT: shrl %cl, (%rdi) # encoding: [0xd3,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i32, ptr %ptr
%shr = lshr i32 %a, %cl
@@ -538,6 +808,13 @@ define void @shr64mcl_legacy(ptr %ptr, i64 %cl) {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shrq %cl, (%rdi) # encoding: [0x48,0xd3,0x2f]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: shr64mcl_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1]
+; NF-NEXT: # kill: def $cl killed $cl killed $rcx
+; NF-NEXT: shrq %cl, (%rdi) # encoding: [0x48,0xd3,0x2f]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%a = load i64, ptr %ptr
%shr = lshr i64 %a, %cl
diff --git a/llvm/test/CodeGen/X86/apx/sub.ll b/llvm/test/CodeGen/X86/apx/sub.ll
index be0914c90b9fa..a38d09587ba91 100644
--- a/llvm/test/CodeGen/X86/apx/sub.ll
+++ b/llvm/test/CodeGen/X86/apx/sub.ll
@@ -1,11 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @sub8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: sub8rr:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub8rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subb %sil, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x28,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i8 %a, %b
ret i8 %sub
@@ -17,6 +23,12 @@ define i16 @sub16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-NEXT: subl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf7]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x29,0xf7]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i16 %a, %b
ret i16 %sub
@@ -27,6 +39,11 @@ define i32 @sub32rr(i32 noundef %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x29,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i32 %a, %b
ret i32 %sub
@@ -37,6 +54,11 @@ define i64 @sub64rr(i64 noundef %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subq %rsi, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x29,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i64 %a, %b
ret i64 %sub
@@ -47,6 +69,11 @@ define i8 @sub8rm(i8 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x2a,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub8rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subb (%rsi), %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x2a,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%b = load i8, ptr %ptr
%sub = sub i8 %a, %b
@@ -58,6 +85,11 @@ define i16 @sub16rm(i16 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x2b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subw (%rsi), %di, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x2b,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%b = load i16, ptr %ptr
%sub = sub i16 %a, %b
@@ -69,6 +101,11 @@ define i32 @sub32rm(i32 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x2b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subl (%rsi), %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x2b,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%b = load i32, ptr %ptr
%sub = sub i32 %a, %b
@@ -80,6 +117,11 @@ define i64 @sub64rm(i64 noundef %a, ptr %ptr) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x2b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subq (%rsi), %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x2b,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%b = load i64, ptr %ptr
%sub = sub i64 %a, %b
@@ -92,6 +134,12 @@ define i16 @sub16ri8(i16 noundef %a) {
; CHECK-NEXT: subl $-128, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xef,0x80]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subl $-128, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xef,0x80]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i16 %a, -128
ret i16 %sub
@@ -102,6 +150,11 @@ define i32 @sub32ri8(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subl $-128, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xef,0x80]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subl $-128, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xef,0x80]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i32 %a, -128
ret i32 %sub
@@ -112,6 +165,11 @@ define i64 @sub64ri8(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $-128, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xef,0x80]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subq $-128, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x83,0xef,0x80]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i64 %a, -128
ret i64 %sub
@@ -122,6 +180,11 @@ define i8 @sub8ri(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb $-123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xc7,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addb $-123, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0xc7,0x85]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i8 %a, 123
ret i8 %sub
@@ -134,6 +197,13 @@ define i16 @sub16ri(i16 noundef %a) {
; CHECK-NEXT: # imm = 0xFB2E
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $-1234, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xc7,0x2e,0xfb,0xff,0xff]
+; NF-NEXT: # imm = 0xFB2E
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i16 %a, 1234
ret i16 %sub
@@ -145,6 +215,12 @@ define i32 @sub32ri(i32 noundef %a) {
; CHECK-NEXT: addl $-123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $-123456, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xc7,0xc0,0x1d,0xfe,0xff]
+; NF-NEXT: # imm = 0xFFFE1DC0
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i32 %a, 123456
ret i32 %sub
@@ -156,6 +232,12 @@ define i64 @sub64ri(i64 noundef %a) {
; CHECK-NEXT: subq $-2147483648, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xef,0x00,0x00,0x00,0x80]
; CHECK-NEXT: # imm = 0x80000000
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subq $-2147483648, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0xef,0x00,0x00,0x00,0x80]
+; NF-NEXT: # imm = 0x80000000
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i64 %a, -2147483648
ret i64 %sub
@@ -166,6 +248,11 @@ define i8 @sub8mr(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub8mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subb %sil, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x28,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%sub = sub nsw i8 %t, %b
@@ -179,6 +266,13 @@ define i16 @sub16mr(ptr %a, i16 noundef %b) {
; CHECK-NEXT: subl %esi, %eax # EVEX TO LEGACY Compression encoding: [0x29,0xf0]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: subl %esi, %eax # EVEX TO LEGACY Compression encoding: [0x29,0xf0]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%sub = sub nsw i16 %t, %b
@@ -190,6 +284,11 @@ define i32 @sub32mr(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subl %esi, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x29,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%sub = sub nsw i32 %t, %b
@@ -201,6 +300,11 @@ define i64 @sub64mr(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subq %rsi, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x29,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%sub = sub nsw i64 %t, %b
@@ -214,6 +318,13 @@ define i16 @sub16mi8(ptr %a) {
; CHECK-NEXT: subl $-128, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe8,0x80]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: subl $-128, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe8,0x80]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%sub = sub nsw i16 %t, -128
@@ -225,6 +336,11 @@ define i32 @sub32mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subl $-128, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x2f,0x80]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subl $-128, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0x2f,0x80]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%sub = sub nsw i32 %t, -128
@@ -236,6 +352,11 @@ define i64 @sub64mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $-128, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x2f,0x80]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subq $-128, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x83,0x2f,0x80]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%sub = sub nsw i64 %t, -128
@@ -247,6 +368,11 @@ define i8 @sub8mi(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb $-123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x07,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub8mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addb $-123, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0x07,0x85]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%sub = sub nsw i8 %t, 123
@@ -261,6 +387,14 @@ define i16 @sub16mi(ptr %a) {
; CHECK-NEXT: # imm = 0xFB2E
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: addl $-1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0x2e,0xfb,0xff,0xff]
+; NF-NEXT: # imm = 0xFB2E
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%sub = sub nsw i16 %t, 1234
@@ -273,6 +407,12 @@ define i32 @sub32mi(ptr %a) {
; CHECK-NEXT: addl $-123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x07,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} addl $-123456, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0x07,0xc0,0x1d,0xfe,0xff]
+; NF-NEXT: # imm = 0xFFFE1DC0
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%sub = sub nsw i32 %t, 123456
@@ -285,6 +425,12 @@ define i64 @sub64mi(ptr %a) {
; CHECK-NEXT: subq $-2147483648, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x2f,0x00,0x00,0x00,0x80]
; CHECK-NEXT: # imm = 0x80000000
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} subq $-2147483648, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0x2f,0x00,0x00,0x00,0x80]
+; NF-NEXT: # imm = 0x80000000
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%sub = sub nsw i64 %t, -2147483648
@@ -305,6 +451,15 @@ define i8 @subflag8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag8rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subb %sil, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x28,0xf7]
+; NF-NEXT: movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b)
ret i8 %sub
@@ -318,6 +473,14 @@ define i16 @subflag16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subw %si, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x29,0xf7]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 %b)
ret i16 %sub
@@ -330,6 +493,13 @@ define i32 @subflag32rr(i32 noundef %a, i32 noundef %b) {
; CHECK-NEXT: subl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x29,0xf7]
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x29,0xf7]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 %b)
ret i32 %sub
@@ -342,6 +512,13 @@ define i64 @subflag64rr(i64 noundef %a, i64 noundef %b) {
; CHECK-NEXT: subq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x29,0xf7]
; CHECK-NEXT: cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x29,0xf7]
+; NF-NEXT: cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
ret i64 %sub
@@ -356,6 +533,15 @@ define i8 @subflag8rm(i8 noundef %a, ptr %b) {
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag8rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subb (%rsi), %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x2a,0x3e]
+; NF-NEXT: movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i8, ptr %b
%sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 %t)
@@ -370,6 +556,14 @@ define i16 @subflag16rm(i16 noundef %a, ptr %b) {
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subw (%rsi), %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x2b,0x3e]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i16, ptr %b
%sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 %t)
@@ -383,6 +577,13 @@ define i32 @subflag32rm(i32 noundef %a, ptr %b) {
; CHECK-NEXT: subl (%rsi), %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x2b,0x3e]
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subl (%rsi), %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x2b,0x3e]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i32, ptr %b
%sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 %t)
@@ -396,6 +597,13 @@ define i64 @subflag64rm(i64 noundef %a, ptr %b) {
; CHECK-NEXT: subq (%rsi), %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x2b,0x3e]
; CHECK-NEXT: cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subq (%rsi), %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x2b,0x3e]
+; NF-NEXT: cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i64, ptr %b
%sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 %t)
@@ -410,6 +618,14 @@ define i16 @subflag16ri8(i16 noundef %a) {
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag16ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subw $123, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xef,0x7b]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 123)
ret i16 %sub
@@ -422,6 +638,13 @@ define i32 @subflag32ri8(i32 noundef %a) {
; CHECK-NEXT: subl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xef,0x7b]
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag32ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xef,0x7b]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 123)
ret i32 %sub
@@ -434,6 +657,13 @@ define i64 @subflag64ri8(i64 noundef %a) {
; CHECK-NEXT: subq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xef,0x7b]
; CHECK-NEXT: cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag64ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xef,0x7b]
+; NF-NEXT: cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 123)
ret i64 %sub
@@ -448,6 +678,15 @@ define i8 @subflag8ri(i8 noundef %a) {
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subb $123, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xef,0x7b]
+; NF-NEXT: movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 123)
ret i8 %sub
@@ -462,6 +701,15 @@ define i16 @subflag16ri(i16 noundef %a) {
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subw $1234, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xef,0xd2,0x04]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 1234)
ret i16 %sub
@@ -475,6 +723,14 @@ define i32 @subflag32ri(i32 noundef %a) {
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xef,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 123456)
ret i32 %sub
@@ -488,6 +744,14 @@ define i64 @subflag64ri(i64 noundef %a) {
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: subflag64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
+; NF-NEXT: subq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xef,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 123456)
ret i64 %sub
@@ -513,6 +777,22 @@ define void @sub64ri_reloc(i64 %val) {
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .LBB41_2: # %f
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64ri_reloc:
+; NF: # %bb.0:
+; NF-NEXT: cmpq $val, %rdi # encoding: [0x48,0x81,0xff,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: val, kind: reloc_signed_4byte
+; NF-NEXT: jbe .LBB41_2 # encoding: [0x76,A]
+; NF-NEXT: # fixup A - offset: 1, value: .LBB41_2-1, kind: FK_PCRel_1
+; NF-NEXT: # %bb.1: # %t
+; NF-NEXT: pushq %rax # encoding: [0x50]
+; NF-NEXT: .cfi_def_cfa_offset 16
+; NF-NEXT: callq f at PLT # encoding: [0xe8,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 1, value: f at PLT-4, kind: FK_PCRel_4
+; NF-NEXT: popq %rax # encoding: [0x58]
+; NF-NEXT: .cfi_def_cfa_offset 8
+; NF-NEXT: .LBB41_2: # %f
+; NF-NEXT: retq # encoding: [0xc3]
%cmp = icmp ugt i64 %val, ptrtoint (ptr @val to i64)
br i1 %cmp, label %t, label %f
@@ -529,6 +809,11 @@ define void @sub8mr_legacy(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subb %sil, (%rdi) # encoding: [0x40,0x28,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub8mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: subb %sil, (%rdi) # encoding: [0x40,0x28,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%sub = sub i8 %t, %b
@@ -541,6 +826,11 @@ define void @sub16mr_legacy(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subw %si, (%rdi) # encoding: [0x66,0x29,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: subw %si, (%rdi) # encoding: [0x66,0x29,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%sub = sub i16 %t, %b
@@ -553,6 +843,11 @@ define void @sub32mr_legacy(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subl %esi, (%rdi) # encoding: [0x29,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: subl %esi, (%rdi) # encoding: [0x29,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%sub = sub i32 %t, %b
@@ -565,6 +860,11 @@ define void @sub64mr_legacy(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq %rsi, (%rdi) # encoding: [0x48,0x29,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: subq %rsi, (%rdi) # encoding: [0x48,0x29,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%sub = sub i64 %t, %b
@@ -577,6 +877,11 @@ define void @sub8mi_legacy(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addb $-123, (%rdi) # encoding: [0x80,0x07,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub8mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addb $-123, (%rdi) # encoding: [0x80,0x07,0x85]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%sub = sub nsw i8 %t, 123
@@ -590,6 +895,12 @@ define void @sub16mi_legacy(ptr %a) {
; CHECK-NEXT: addw $-1234, (%rdi) # encoding: [0x66,0x81,0x07,0x2e,0xfb]
; CHECK-NEXT: # imm = 0xFB2E
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub16mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addw $-1234, (%rdi) # encoding: [0x66,0x81,0x07,0x2e,0xfb]
+; NF-NEXT: # imm = 0xFB2E
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%sub = sub nsw i16 %t, 1234
@@ -603,6 +914,12 @@ define void @sub32mi_legacy(ptr %a) {
; CHECK-NEXT: addl $-123456, (%rdi) # encoding: [0x81,0x07,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub32mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addl $-123456, (%rdi) # encoding: [0x81,0x07,0xc0,0x1d,0xfe,0xff]
+; NF-NEXT: # imm = 0xFFFE1DC0
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%sub = sub nsw i32 %t, 123456
@@ -616,6 +933,12 @@ define void @sub64mi_legacy(ptr %a) {
; CHECK-NEXT: addq $-123456, (%rdi) # encoding: [0x48,0x81,0x07,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: sub64mi_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: addq $-123456, (%rdi) # encoding: [0x48,0x81,0x07,0xc0,0x1d,0xfe,0xff]
+; NF-NEXT: # imm = 0xFFFE1DC0
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%sub = sub nsw i64 %t, 123456
diff --git a/llvm/test/CodeGen/X86/apx/xor.ll b/llvm/test/CodeGen/X86/apx/xor.ll
index d203fbb02782a..436b16b4292df 100644
--- a/llvm/test/CodeGen/X86/apx/xor.ll
+++ b/llvm/test/CodeGen/X86/apx/xor.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @xor8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: xor8rr:
@@ -7,6 +8,12 @@ define i8 @xor8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-NEXT: xorl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xf7]
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor8rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x31,0xf7]
+; NF-NEXT: # kill: def $al killed $al killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i8 %a, %b
ret i8 %xor
@@ -18,6 +25,12 @@ define i16 @xor16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-NEXT: xorl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xf7]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor16rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x31,0xf7]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i16 %a, %b
ret i16 %xor
@@ -28,6 +41,11 @@ define i32 @xor32rr(i32 noundef %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor32rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x31,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i32 %a, %b
ret i32 %xor
@@ -38,6 +56,11 @@ define i64 @xor64rr(i64 noundef %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x31,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor64rr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorq %rsi, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x31,0xf7]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i64 %a, %b
ret i64 %xor
@@ -48,6 +71,11 @@ define i8 @xor8rm(i8 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x32,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor8rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorb (%rsi), %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x32,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i8, ptr %b
%xor = xor i8 %a, %t
@@ -59,6 +87,11 @@ define i16 @xor16rm(i16 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x33,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor16rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorw (%rsi), %di, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x33,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i16, ptr %b
%xor = xor i16 %a, %t
@@ -70,6 +103,11 @@ define i32 @xor32rm(i32 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x33,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor32rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl (%rsi), %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x33,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i32, ptr %b
%xor = xor i32 %a, %t
@@ -81,6 +119,11 @@ define i64 @xor64rm(i64 noundef %a, ptr %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x33,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor64rm:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorq (%rsi), %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x33,0x3e]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t = load i64, ptr %b
%xor = xor i64 %a, %t
@@ -93,6 +136,12 @@ define i16 @xor16ri8(i16 noundef %a) {
; CHECK-NEXT: xorl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xf7,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor16ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xf7,0x7b]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i16 %a, 123
ret i16 %xor
@@ -103,6 +152,11 @@ define i32 @xor32ri8(i32 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xf7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor32ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xf7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i32 %a, 123
ret i32 %xor
@@ -113,6 +167,11 @@ define i64 @xor64ri8(i64 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xf7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor64ri8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorq $123, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x83,0xf7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i64 %a, 123
ret i64 %xor
@@ -123,6 +182,11 @@ define i8 @xor8ri(i8 noundef %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xf7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor8ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorb $123, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0xf7,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i8 %a, 123
ret i8 %xor
@@ -135,6 +199,13 @@ define i16 @xor16ri(i16 noundef %a) {
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor16ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl $1234, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xf7,0xd2,0x04,0x00,0x00]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i16 %a, 1234
ret i16 %xor
@@ -146,6 +217,12 @@ define i32 @xor32ri(i32 noundef %a) {
; CHECK-NEXT: xorl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xf7,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor32ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl $123456, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xf7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i32 %a, 123456
ret i32 %xor
@@ -157,6 +234,12 @@ define i64 @xor64ri(i64 noundef %a) {
; CHECK-NEXT: xorq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xf7,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor64ri:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorq $123456, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0xf7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i64 %a, 123456
ret i64 %xor
@@ -167,6 +250,11 @@ define i8 @xor8mr(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x30,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor8mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorb %sil, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x30,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%xor = xor i8 %t, %b
@@ -178,6 +266,11 @@ define i16 @xor16mr(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x31,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor16mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorw %si, (%rdi), %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x31,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%xor = xor i16 %t, %b
@@ -189,6 +282,11 @@ define i32 @xor32mr(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor32mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl %esi, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x31,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%xor = xor i32 %t, %b
@@ -200,6 +298,11 @@ define i64 @xor64mr(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x31,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor64mr:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorq %rsi, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x31,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%xor = xor i64 %t, %b
@@ -213,6 +316,13 @@ define i16 @xor16mi8(ptr %a) {
; CHECK-NEXT: xorl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xf0,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor16mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: xorl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xf0,0x7b]
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%xor = xor i16 %t, 123
@@ -224,6 +334,11 @@ define i32 @xor32mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x37,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor32mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl $123, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0x37,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%xor = xor i32 %t, 123
@@ -235,6 +350,11 @@ define i64 @xor64mi8(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x37,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor64mi8:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorq $123, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x83,0x37,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%xor = xor i64 %t, 123
@@ -246,6 +366,11 @@ define i8 @xor8mi(ptr %a) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x37,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor8mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorb $123, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0x37,0x7b]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%xor = xor i8 %t, 123
@@ -260,6 +385,14 @@ define i16 @xor16mi(ptr %a) {
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor16mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07]
+; NF-NEXT: xorl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x35,0xd2,0x04,0x00,0x00]
+; NF-NEXT: # imm = 0x4D2
+; NF-NEXT: # kill: def $ax killed $ax killed $eax
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%xor = xor i16 %t, 1234
@@ -272,6 +405,12 @@ define i32 @xor32mi(ptr %a) {
; CHECK-NEXT: xorl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x37,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor32mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorl $123456, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0x37,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%xor = xor i32 %t, 123456
@@ -284,6 +423,12 @@ define i64 @xor64mi(ptr %a) {
; CHECK-NEXT: xorq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x37,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor64mi:
+; NF: # %bb.0: # %entry
+; NF-NEXT: {nf} xorq $123456, (%rdi), %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x81,0x37,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%xor = xor i64 %t, 123456
@@ -301,6 +446,15 @@ define i1 @xorflag8rr(i8 %a, i8 %b) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag8rr:
+; NF: # %bb.0:
+; NF-NEXT: {nf} xorl %edi, %esi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x31,0xfe]
+; NF-NEXT: xorb $-1, %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xf0,0xff]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i8 %b, -1
%v0 = xor i8 %a, %xor ; 0xff << 50
%v1 = icmp eq i8 %v0, 0
@@ -317,6 +471,15 @@ define i1 @xorflag16rr(i16 %a, i16 %b) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag16rr:
+; NF: # %bb.0:
+; NF-NEXT: {nf} xorl %edi, %esi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x31,0xfe]
+; NF-NEXT: xorw $-1, %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xf0,0xff]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 %b, -1
%v0 = xor i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -332,6 +495,14 @@ define i1 @xorflag32rr(i32 %a, i32 %b) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag32rr:
+; NF: # %bb.0:
+; NF-NEXT: xorl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x31,0xf7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = xor i32 %a, %b ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -346,6 +517,14 @@ define i1 @xorflag64rr(i64 %a, i64 %b) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag64rr:
+; NF: # %bb.0:
+; NF-NEXT: xorq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x31,0xf7]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = xor i64 %a, %b ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -361,6 +540,15 @@ define i1 @xorflag8rm(ptr %ptr, i8 %b) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag8rm:
+; NF: # %bb.0:
+; NF-NEXT: {nf} xorb (%rdi), %sil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x32,0x37]
+; NF-NEXT: xorb $-1, %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xf0,0xff]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i8, ptr %ptr
%xor = xor i8 %b, -1
%v0 = xor i8 %a, %xor ; 0xff << 50
@@ -378,6 +566,15 @@ define i1 @xorflag16rm(ptr %ptr, i16 %b) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag16rm:
+; NF: # %bb.0:
+; NF-NEXT: {nf} xorw (%rdi), %si, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x33,0x37]
+; NF-NEXT: xorw $-1, %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xf0,0xff]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i16, ptr %ptr
%xor = xor i16 %b, -1
%v0 = xor i16 %a, %xor ; 0xff << 50
@@ -394,6 +591,14 @@ define i1 @xorflag32rm(ptr %ptr, i32 %b) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag32rm:
+; NF: # %bb.0:
+; NF-NEXT: xorl (%rdi), %esi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x33,0x37]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i32, ptr %ptr
%v0 = xor i32 %a, %b ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
@@ -409,6 +614,14 @@ define i1 @xorflag64rm(ptr %ptr, i64 %b) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag64rm:
+; NF: # %bb.0:
+; NF-NEXT: xorq (%rdi), %rsi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x33,0x37]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%a = load i64, ptr %ptr
%v0 = xor i64 %a, %b ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
@@ -424,6 +637,14 @@ define i1 @xorflag8ri(i8 %a) {
; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag8ri:
+; NF: # %bb.0:
+; NF-NEXT: xorb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xf7,0x84]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i8 123, -1
%v0 = xor i8 %a, %xor ; 0xff << 50
%v1 = icmp eq i8 %v0, 0
@@ -440,6 +661,15 @@ define i1 @xorflag16ri(i16 %a) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag16ri:
+; NF: # %bb.0:
+; NF-NEXT: xorw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xf7,0x2d,0xfb]
+; NF-NEXT: # imm = 0xFB2D
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 1234, -1
%v0 = xor i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -456,6 +686,15 @@ define i1 @xorflag32ri(i32 %a) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag32ri:
+; NF: # %bb.0:
+; NF-NEXT: xorl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xf7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = xor i32 %a, 123456 ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -471,6 +710,15 @@ define i1 @xorflag64ri(i64 %a) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag64ri:
+; NF: # %bb.0:
+; NF-NEXT: xorq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xf7,0x40,0xe2,0x01,0x00]
+; NF-NEXT: # imm = 0x1E240
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = xor i64 %a, 123456 ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -485,6 +733,14 @@ define i1 @xorflag16ri8(i16 %a) {
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag16ri8:
+; NF: # %bb.0:
+; NF-NEXT: xorw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xf7,0x84]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%xor = xor i16 123, -1
%v0 = xor i16 %a, %xor ; 0xff << 50
%v1 = icmp eq i16 %v0, 0
@@ -500,6 +756,14 @@ define i1 @xorflag32ri8(i32 %a) {
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag32ri8:
+; NF: # %bb.0:
+; NF-NEXT: xorl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xf7,0x7b]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = xor i32 %a, 123 ; 0xff << 50
%v1 = icmp eq i32 %v0, 0
store i32 %v0, ptr @d64
@@ -514,6 +778,14 @@ define i1 @xorflag64ri8(i64 %a) {
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xorflag64ri8:
+; NF: # %bb.0:
+; NF-NEXT: xorq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xf7,0x7b]
+; NF-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
+; NF-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
+; NF-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
+; NF-NEXT: retq # encoding: [0xc3]
%v0 = xor i64 %a, 123 ; 0xff << 50
%v1 = icmp eq i64 %v0, 0
store i64 %v0, ptr @d64
@@ -525,6 +797,11 @@ define void @xor8mr_legacy(ptr %a, i8 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorb %sil, (%rdi) # encoding: [0x40,0x30,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor8mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorb %sil, (%rdi) # encoding: [0x40,0x30,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i8, ptr %a
%xor = xor i8 %t, %b
@@ -537,6 +814,11 @@ define void @xor16mr_legacy(ptr %a, i16 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorw %si, (%rdi) # encoding: [0x66,0x31,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor16mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorw %si, (%rdi) # encoding: [0x66,0x31,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i16, ptr %a
%xor = xor i16 %t, %b
@@ -549,6 +831,11 @@ define void @xor32mr_legacy(ptr %a, i32 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %esi, (%rdi) # encoding: [0x31,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor32mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorl %esi, (%rdi) # encoding: [0x31,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
%xor = xor i32 %t, %b
@@ -561,6 +848,11 @@ define void @xor64mr_legacy(ptr %a, i64 noundef %b) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorq %rsi, (%rdi) # encoding: [0x48,0x31,0x37]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; NF-LABEL: xor64mr_legacy:
+; NF: # %bb.0: # %entry
+; NF-NEXT: xorq %rsi, (%rdi) # encoding: [0x48,0x31,0x37]
+; NF-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
%xor = xor i64 %t, %b
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