[llvm] Split vgpr regalloc pipeline (PR #93526)

[Gang Chen via llvm-commits]

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@@ -1387,11 +1455,20 @@ bool GCNPassConfig::addRegAssignAndRewriteFast() {
 
   // Equivalent of PEI for SGPRs.
   addPass(&SILowerSGPRSpillsID);
+
+  // To Allocate wwm registers used in whole quad mode operations (for pixel
+  // shaders).
   addPass(&SIPreAllocateWWMRegsID);
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cmc-rep wrote:

My comment here maybe should be a follow up to this patch:  SIPreAllocateWWMRegs perhaps should be renamed to SIPreAllocateWQMRegsInPS, and its functionality should be limited to WQM registers.   Allocating all the whole-wave-mode value (not just SGPR spills) should be done during WWMRegAlloc 

https://github.com/llvm/llvm-project/pull/93526