[llvm] [LegalizeTypes] Use VP_AND and VP_SHL/VP_SRA to promote operands fo VP arithmetic. (PR #92799)

[Craig Topper via llvm-commits]

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@@ -10,10 +10,9 @@ define <8 x i7> @vdivu_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroe
 ; CHECK-LABEL: vdivu_vv_v8i7:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    li a1, 127
-; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
-; CHECK-NEXT:    vand.vx v9, v9, a1
-; CHECK-NEXT:    vand.vx v8, v8, a1
 ; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
+; CHECK-NEXT:    vand.vx v9, v9, a1, v0.t
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topperc wrote:

> In this case, the use of the vp_and appears to be a semantic change. The masked off lines were previously legalized, and now aren't. Which is the expected behavior?

The masked off elements aren't consumed by the vp_udiv since it has the same mask so it shouldn't matter.

> Setting the correctness aside for a moment, I'd expect the unmasked legalization (using a temporary register) to frequently perform better. Where's the right place to account for that? Probably not during legalization per se, but these look like perf regressions in practice to me. Do we care?

Agreed. I'm skeptical that using a mask on VP arithmetic intrinsics makes sense in general. Division is probably the most useful case to avoid undefined behavior or improve latency.

I can drop the masks if you want. My primary goal was fixing the VL toggles.

https://github.com/llvm/llvm-project/pull/92799