[llvm] [RISCV] Combine vXi32 (mul (and (lshr X, 15), 0x10001), 0xffff) -> (bitcast (sra (v2Xi16 (bitcast X)), 15)) (PR #93565)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue May 28 08:44:09 PDT 2024


https://github.com/topperc edited https://github.com/llvm/llvm-project/pull/93565


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