[llvm] 7529fe2 - [AMDGPU] Only set Info.memVT when not later overridden (#92670)

[via llvm-commits]

Author: Jessica Clarke
Date: 2024-05-20T07:08:40+01:00
New Revision: 7529fe2e92e79eef22a528a7168e4dd777d6e9bd

URL: https://github.com/llvm/llvm-project/commit/7529fe2e92e79eef22a528a7168e4dd777d6e9bd
DIFF: https://github.com/llvm/llvm-project/commit/7529fe2e92e79eef22a528a7168e4dd777d6e9bd.diff

LOG: [AMDGPU] Only set Info.memVT when not later overridden (#92670)

For the amdgcn_*_buffer_load_lds intrinsics this field is later
overriden, so avoid pointlessly calling MVT::getVT in that case.
Importantly, this is also the only case I can find in tree where a
PointerType is passed to MVT::getVT, so this will allow us to forbid
doing so in future, keeping MVT::iPTR as originating solely from
TableGen as was claimed next to its definition in MachineValueType.h
(but lost in the autogeneration conversion).

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index c7c4a8faa2fb0..d7b6941fcf81d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1233,13 +1233,13 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
       // Atomic
       Info.opc = CI.getType()->isVoidTy() ? ISD::INTRINSIC_VOID :
                                             ISD::INTRINSIC_W_CHAIN;
-      Info.memVT = MVT::getVT(CI.getArgOperand(0)->getType());
       Info.flags |= MachineMemOperand::MOLoad |
                     MachineMemOperand::MOStore |
                     MachineMemOperand::MODereferenceable;
 
       switch (IntrID) {
       default:
+        Info.memVT = MVT::getVT(CI.getArgOperand(0)->getType());
         // XXX - Should this be volatile without known ordering?
         Info.flags |= MachineMemOperand::MOVolatile;
         break;