[llvm] 689bba1 - [DAG] canCreateUndefOrPoison - merge INSERT_VECTOR_ELT/EXTRACT_VECTOR_ELT cases. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun May 19 02:28:33 PDT 2024
Author: Simon Pilgrim
Date: 2024-05-19T10:25:01+01:00
New Revision: 689bba1eec31fa236e2febaa4bcf46bc89ba432b
URL: https://github.com/llvm/llvm-project/commit/689bba1eec31fa236e2febaa4bcf46bc89ba432b
DIFF: https://github.com/llvm/llvm-project/commit/689bba1eec31fa236e2febaa4bcf46bc89ba432b.diff
LOG: [DAG] canCreateUndefOrPoison - merge INSERT_VECTOR_ELT/EXTRACT_VECTOR_ELT cases. NFC.
The only difference is the operand index for the element index variable.
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 247f52370e4c1..6a4ff741af10a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5241,17 +5241,12 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
// Check if we demand any upper (undef) elements.
return !PoisonOnly && DemandedElts.ugt(1);
+ case ISD::INSERT_VECTOR_ELT:
case ISD::EXTRACT_VECTOR_ELT: {
// Ensure that the element index is in bounds.
EVT VecVT = Op.getOperand(0).getValueType();
- KnownBits KnownIdx = computeKnownBits(Op.getOperand(1), Depth + 1);
- return KnownIdx.getMaxValue().uge(VecVT.getVectorMinNumElements());
- }
-
- case ISD::INSERT_VECTOR_ELT:{
- // Ensure that the element index is in bounds.
- EVT VecVT = Op.getOperand(0).getValueType();
- KnownBits KnownIdx = computeKnownBits(Op.getOperand(2), Depth + 1);
+ SDValue Idx = Op.getOperand(Opcode == ISD::INSERT_VECTOR_ELT ? 2 : 1);
+ KnownBits KnownIdx = computeKnownBits(Idx, Depth + 1);
return KnownIdx.getMaxValue().uge(VecVT.getVectorMinNumElements());
}
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