[llvm] [AArch64][SVE] Handle consecutive Predicates in CC_AArch64_Custom_Block (PR #90122)

[Zhaoshi Zheng via llvm-commits]

zhaoshiz wrote:

@sdesmalen-arm I've added test cases where scalable predicate args are passed by reference through the stack. I also think remove the assertions triggered by [1 x <vscale x 16 x i1>] args in LowerFormalArguments() and LowerCall().
@efriedma-quic thanks for the pointer, will address load/store of non-nvx16i1 types in the furture.

https://github.com/llvm/llvm-project/pull/90122