[llvm] [DAG] Use copysign in frem power-2 fold. (PR #91751)

[David Green via llvm-commits]

================
@@ -17383,15 +17383,22 @@ SDValue DAGCombiner::visitFREM(SDNode *N) {
       TLI.isOperationLegalOrCustom(ISD::FMUL, VT) &&
       TLI.isOperationLegalOrCustom(ISD::FDIV, VT) &&
       TLI.isOperationLegalOrCustom(ISD::FTRUNC, VT) &&
-      DAG.isKnownToBeAPowerOfTwoFP(N1) &&
-      (Flags.hasNoSignedZeros() || DAG.cannotBeOrderedNegativeFP(N0))) {
-    SDValue Div = DAG.getNode(ISD::FDIV, DL, VT, N0, N1);
-    SDValue Rnd = DAG.getNode(ISD::FTRUNC, DL, VT, Div);
-    if (TLI.isFMAFasterThanFMulAndFAdd(DAG.getMachineFunction(), VT))
-      return DAG.getNode(ISD::FMA, DL, VT, DAG.getNode(ISD::FNEG, DL, VT, Rnd),
-                         N1, N0);
-    SDValue Mul = DAG.getNode(ISD::FMUL, DL, VT, Rnd, N1);
-    return DAG.getNode(ISD::FSUB, DL, VT, N0, Mul);
+      DAG.isKnownToBeAPowerOfTwoFP(N1)) {
+    bool NeedsCopySign =
+        !Flags.hasNoSignedZeros() && !DAG.cannotBeOrderedNegativeFP(N0);
+    if (!NeedsCopySign || TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, VT)) {
----------------
davemgreen wrote:

I was aiming for either knowing that the COPYSIGN isn't necessary, or checking that the lowering was going to be at least somewhat sensible. I think you might be right though, if we've already checked legality the conditions above we can assume the copysign is fine too.

https://github.com/llvm/llvm-project/pull/91751