[llvm] [AArch64][SME] Remove unused ZA lazy-save (PR #81648)
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Fri May 17 05:41:01 PDT 2024
================
@@ -2929,6 +2931,82 @@ AArch64TargetLowering::EmitZero(MachineInstr &MI, MachineBasicBlock *BB) const {
return BB;
}
+MachineBasicBlock *
+AArch64TargetLowering::EmitInitTPIDR2Object(MachineInstr &MI,
+ MachineBasicBlock *BB) const {
+ MachineFunction *MF = BB->getParent();
+ MachineFrameInfo &MFI = MF->getFrameInfo();
+ AArch64FunctionInfo *FuncInfo = MF->getInfo<AArch64FunctionInfo>();
+ TPIDR2Object &TPIDR2 = FuncInfo->getTPIDR2Obj();
+ if (TPIDR2.Uses > 0) {
+ const TargetInstrInfo *TII = Subtarget->getInstrInfo();
+ // Store the buffer pointer to the TPIDR2 stack object.
+ BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::STRXui))
+ .addReg(MI.getOperand(0).getReg())
+ .addFrameIndex(TPIDR2.FrameIndex)
+ .addImm(0);
+ // Set the reserved bytes (10-15) to zero
+ BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::STRHHui))
+ .addReg(AArch64::WZR)
+ .addFrameIndex(TPIDR2.FrameIndex)
+ .addImm(5);
+ BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::STRWui))
+ .addReg(AArch64::WZR)
+ .addFrameIndex(TPIDR2.FrameIndex)
+ .addImm(3);
+ } else
+ MFI.RemoveStackObject(TPIDR2.FrameIndex);
+
+ BB->remove_instr(&MI);
+ return BB;
+}
+
+MachineBasicBlock *
+AArch64TargetLowering::EmitExpandZABuffer(MachineInstr &MI,
+ MachineBasicBlock *BB) const {
+ MachineFunction *MF = BB->getParent();
+ MachineFrameInfo &MFI = MF->getFrameInfo();
+ AArch64FunctionInfo *FuncInfo = MF->getInfo<AArch64FunctionInfo>();
+ // TODO This function grows the stack with a subtraction, which doesn't work
+ // on Windows. Some refactoring to share the functionality in
+ // LowerWindowsDYNAMIC_STACKALLOC will be required once the Windows ABI
+ // supports SME
+ assert(!MF->getSubtarget<AArch64Subtarget>().isTargetWindows() &&
+ "Lazy ZA save is not yet supported on Windows");
+
+ TPIDR2Object &TPIDR2 = FuncInfo->getTPIDR2Obj();
+
+ if (TPIDR2.Uses > 0) {
+ const TargetInstrInfo *TII = Subtarget->getInstrInfo();
+ MachineRegisterInfo &MRI = MF->getRegInfo();
+
+ // The SUBXrs below won't always be emitted in a form that accepts SP
+ // directly
+ Register SP = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
+ BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY), SP)
+ .addReg(AArch64::SP);
+
+ // Allocate a lazy-save buffer object of the size given, normally SVL * SVL
+ Register BufferAddr = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
+ BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::SUBXrs), BufferAddr)
+ .addReg(SP)
+ .add(MI.getOperand(1))
+ .addImm(0);
+ BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY),
+ AArch64::SP)
+ .addReg(BufferAddr);
+ BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY),
+ MI.getOperand(0).getReg())
+ .addReg(BufferAddr);
----------------
sdesmalen-arm wrote:
`BufferAddr` and this COPY are superfluous, since you could have stored the result of the SUBXrs directly to `MI.getOperand(0).getReg()` (the destination reg)
https://github.com/llvm/llvm-project/pull/81648
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