[llvm] [AArch64] Optimization of repeated constant loads (#51483) (PR #86249)
via llvm-commits
llvm-commits at lists.llvm.org
Thu May 16 23:04:32 PDT 2024
================
@@ -0,0 +1,76 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
+
+define i64 @test0x1234567812345678() {
+; CHECK-LABEL: test0x1234567812345678:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov x0, #22136 // =0x5678
+; CHECK-NEXT: movk x0, #4660, lsl #16
+; CHECK-NEXT: orr x0, x0, x0, lsl #32
+; CHECK-NEXT: ret
+ ret i64 u0x1234567812345678
+}
+
+define i64 @test0xff3456ffff3456ff() {
+; CHECK-LABEL: test0xff3456ffff3456ff:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov x0, #22271 // =0x56ff
+; CHECK-NEXT: movk x0, #65332, lsl #16
+; CHECK-NEXT: orr x0, x0, x0, lsl #32
+; CHECK-NEXT: ret
+ ret i64 u0xff3456ffff3456ff
+}
+
+define i64 @test0x00345600345600() {
+; CHECK-LABEL: test0x00345600345600:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov x0, #22016 // =0x5600
+; CHECK-NEXT: movk x0, #52, lsl #16
+; CHECK-NEXT: movk x0, #13398, lsl #32
+; CHECK-NEXT: ret
+ ret i64 u0x00345600345600
+}
+
+define i64 @test0x5555555555555555() {
+; CHECK-LABEL: test0x5555555555555555:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov x0, #6148914691236517205 // =0x5555555555555555
+; CHECK-NEXT: ret
+ ret i64 u0x5555555555555555
+}
+
+define i64 @test0x5055555550555555() {
+; CHECK-LABEL: test0x5055555550555555:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov x0, #6148914691236517205 // =0x5555555555555555
+; CHECK-NEXT: and x0, x0, #0xf0fffffff0ffffff
+; CHECK-NEXT: ret
+ ret i64 u0x5055555550555555
+}
+
+define i64 @test0x0000555555555555() {
+; CHECK-LABEL: test0x0000555555555555:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov x0, #6148914691236517205 // =0x5555555555555555
+; CHECK-NEXT: movk x0, #0, lsl #48
+; CHECK-NEXT: ret
+ ret i64 u0x0000555555555555
+}
+
+define i64 @test0x0000555500005555() {
+; CHECK-LABEL: test0x0000555500005555:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov x0, #21845 // =0x5555
+; CHECK-NEXT: orr x0, x0, x0, lsl #32
+; CHECK-NEXT: ret
+ ret i64 u0x0000555500005555
+}
+
+define i64 @testu0xffff5555ffff5555() {
+; CHECK-LABEL: testu0xffff5555ffff5555:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov x0, #-43691 // =0xffffffffffff5555
+; CHECK-NEXT: orr x0, x0, x0, lsl #32
----------------
ParkHanbum wrote:
Thank you very much for showing us how to write tests. I added two tests
https://github.com/llvm/llvm-project/pull/86249
More information about the llvm-commits
mailing list