[llvm] [AArch64][SME] Enable subreg liveness tracking when SME is available (PR #92142)

[David Green via llvm-commits]

davemgreen wrote:

> I wasn't aware of any functional issues from enabling this. From reading the comments on that patch and seeing what other targets do, that issue could be due to the way they've modelled register aliasing for different values of 'LMUL'. I can't really see how the instruction they've pointed to as an example would do the expected thing for the way they have described it. The instruction doesn't use the VRM2 RC, but just VR, so the register allocator is free to pick a non-VRM2 register. I'm not aware of us doing something similar.

It was apparently fixed by https://reviews.llvm.org/D129735. It needs to be the entire backend that works with subregister-liveness. It can be easy for one part of it not to work with them, but for it to go unnoticed whilst it is not enabled. There were some fixes we needed before I enabled this for Arm, and I remember I was running at least 4 different fuzzers at the time on MVE code.

> FWIW, I'd be happy to enable subreg liveness tracking always if there is no downside to compile-time. Perhaps this is not an issue in practice, but if it is then I'd still recommend only enabling it for SME only. I agree it would be helpful to add a flag to manually disable subreg liveness tracking, if needed.

I feel like that may be best so long as the compile-time impact is low(ish). We should see a perf improvement for Neon and SVE as well as SME. You could say either this is correct and the compile times is acceptable, in which case lets do it, or it is not acceptable anyway.

https://github.com/llvm/llvm-project/pull/92142