[llvm] riscv: Added Zvinsert instructions (PR #92262)

[Abel Bernabeu via llvm-commits]

abel-bernabeu wrote:

Alex,

This extension is not yet ratified.  The discussion of Zvinsert is ongoing on the RISC-V Vector SIG mailing list. The current version is 0.94 and some minor changes are still expected, although the encoding seems stable. Find the latest draft from today attached.

I am making this LLVM patch available as a draft pull request for several reasons:

- double checking the encodings do not collide with any existing instructions.
- enabling the QEMU development work.
- moving towards getting all our ducks in a row before ratification.

[Zvinsert Vector Extension.pdf](https://github.com/llvm/llvm-project/files/15326191/Zvinsert.Vector.Extension.pdf)

https://github.com/llvm/llvm-project/pull/92262