[llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)

via llvm-commits llvm-commits at lists.llvm.org
Wed May 15 09:38:24 PDT 2024


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git-clang-format --diff 70ada5b178a14363dc6d30fbf531e47d3933a086 8e98ab8e21ee57a9a6e5c9194c02cefe0a3f63cf -- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/lib/Target/PowerPC/PPCInstrInfo.h llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 8950cbc6ec..fb6091400c 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -5416,7 +5416,7 @@ void PPCInstrInfo::PromoteInstr32To64ForEmliEXTSW(const Register &Reg,
     BuildMI(*MBB, MI, DL, TII->get(NewOpcode), NewDefinedReg);
     MachineBasicBlock::instr_iterator Iter(MI);
     --Iter;
-    MachineInstrBuilder  MIBuilder(*Iter->getMF(), Iter);
+    MachineInstrBuilder MIBuilder(*Iter->getMF(), Iter);
     for (unsigned i = 1; i < MI->getNumOperands(); i++) {
       if (PromoteRegs.find(i) != PromoteRegs.end())
         MIBuilder.addReg(PromoteRegs[i], RegState::Kill);

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https://github.com/llvm/llvm-project/pull/85451


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