[llvm] e26eacf - [X86] prefetch.ll - cleanup check prefixes identified in #92248
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed May 15 06:11:39 PDT 2024
Author: Simon Pilgrim
Date: 2024-05-15T14:11:24+01:00
New Revision: e26eacf771fed3226058a84d5d83f94994f583b2
URL: https://github.com/llvm/llvm-project/commit/e26eacf771fed3226058a84d5d83f94994f583b2
DIFF: https://github.com/llvm/llvm-project/commit/e26eacf771fed3226058a84d5d83f94994f583b2.diff
LOG: [X86] prefetch.ll - cleanup check prefixes identified in #92248
Avoid using leading numbers in check prefixes - replace with actual triple config names (and makes it easier to add X64 test coverage in a future commit).
Added:
Modified:
llvm/test/CodeGen/X86/prefetch.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/prefetch.ll b/llvm/test/CodeGen/X86/prefetch.ll
index 3cfa0e3efcb1e..404d49b63f25c 100644
--- a/llvm/test/CodeGen/X86/prefetch.ll
+++ b/llvm/test/CodeGen/X86/prefetch.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+prfchw | FileCheck %s -check-prefix=PRFCHWSSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHWSSE
-; RUN: llc < %s -mtriple=i686-- -mcpu=slm | FileCheck %s -check-prefix=PRFCHWSSE
-; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 | FileCheck %s -check-prefix=PRFCHWSSE
-; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=SSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+prefetchwt1 | FileCheck %s -check-prefix=PREFETCHWT1
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse,+prefetchwt1 | FileCheck %s -check-prefix=PREFETCHWT1
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse,+3dnow,+prefetchwt1 | FileCheck %s -check-prefix=PREFETCHWT1
-; RUN: llc < %s -mtriple=i686-- -mattr=+3dnow | FileCheck %s -check-prefix=3DNOW
-; RUN: llc < %s -mtriple=i686-- -mattr=+3dnow,+prfchw | FileCheck %s -check-prefix=3DNOW
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+prfchw | FileCheck %s -check-prefix=X86-PRFCHWSSE
+; RUN: llc < %s -mtriple=i686-- -mattr=+prfchw | FileCheck %s -check-prefix=X86-PRFCHWSSE
+; RUN: llc < %s -mtriple=i686-- -mcpu=slm | FileCheck %s -check-prefix=X86-PRFCHWSSE
+; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 | FileCheck %s -check-prefix=X86-PRFCHWSSE
+; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=X86-SSE
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+prefetchwt1 | FileCheck %s -check-prefix=X86-PREFETCHWT1
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse,+prefetchwt1 | FileCheck %s -check-prefix=X86-PREFETCHWT1
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse,+3dnow,+prefetchwt1 | FileCheck %s -check-prefix=X86-PREFETCHWT1
+; RUN: llc < %s -mtriple=i686-- -mattr=+3dnow | FileCheck %s -check-prefix=X86-3DNOW
+; RUN: llc < %s -mtriple=i686-- -mattr=+3dnow,+prfchw | FileCheck %s -check-prefix=X86-3DNOW
; Rules:
; 3dnow by itself get you just the single prefetch instruction with no hints
@@ -22,67 +22,67 @@
; rdar://10538297
define void @t(ptr %ptr) nounwind {
-; SSE-LABEL: t:
-; SSE: # %bb.0: # %entry
-; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; SSE-NEXT: prefetcht2 (%eax)
-; SSE-NEXT: prefetcht1 (%eax)
-; SSE-NEXT: prefetcht0 (%eax)
-; SSE-NEXT: prefetchnta (%eax)
-; SSE-NEXT: prefetcht2 (%eax)
-; SSE-NEXT: prefetcht1 (%eax)
-; SSE-NEXT: prefetcht0 (%eax)
-; SSE-NEXT: prefetchnta (%eax)
-; SSE-NEXT: retl
+; X86-SSE-LABEL: t:
+; X86-SSE: # %bb.0: # %entry
+; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-SSE-NEXT: prefetcht2 (%eax)
+; X86-SSE-NEXT: prefetcht1 (%eax)
+; X86-SSE-NEXT: prefetcht0 (%eax)
+; X86-SSE-NEXT: prefetchnta (%eax)
+; X86-SSE-NEXT: prefetcht2 (%eax)
+; X86-SSE-NEXT: prefetcht1 (%eax)
+; X86-SSE-NEXT: prefetcht0 (%eax)
+; X86-SSE-NEXT: prefetchnta (%eax)
+; X86-SSE-NEXT: retl
;
-; PRFCHWSSE-LABEL: t:
-; PRFCHWSSE: # %bb.0: # %entry
-; PRFCHWSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; PRFCHWSSE-NEXT: prefetcht2 (%eax)
-; PRFCHWSSE-NEXT: prefetcht1 (%eax)
-; PRFCHWSSE-NEXT: prefetcht0 (%eax)
-; PRFCHWSSE-NEXT: prefetchnta (%eax)
-; PRFCHWSSE-NEXT: prefetchw (%eax)
-; PRFCHWSSE-NEXT: prefetchw (%eax)
-; PRFCHWSSE-NEXT: prefetchw (%eax)
-; PRFCHWSSE-NEXT: prefetchw (%eax)
-; PRFCHWSSE-NEXT: retl
+; X86-PRFCHWSSE-LABEL: t:
+; X86-PRFCHWSSE: # %bb.0: # %entry
+; X86-PRFCHWSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-PRFCHWSSE-NEXT: prefetcht2 (%eax)
+; X86-PRFCHWSSE-NEXT: prefetcht1 (%eax)
+; X86-PRFCHWSSE-NEXT: prefetcht0 (%eax)
+; X86-PRFCHWSSE-NEXT: prefetchnta (%eax)
+; X86-PRFCHWSSE-NEXT: prefetchw (%eax)
+; X86-PRFCHWSSE-NEXT: prefetchw (%eax)
+; X86-PRFCHWSSE-NEXT: prefetchw (%eax)
+; X86-PRFCHWSSE-NEXT: prefetchw (%eax)
+; X86-PRFCHWSSE-NEXT: retl
;
-; PREFETCHWT1-LABEL: t:
-; PREFETCHWT1: # %bb.0: # %entry
-; PREFETCHWT1-NEXT: movl {{[0-9]+}}(%esp), %eax
-; PREFETCHWT1-NEXT: prefetcht2 (%eax)
-; PREFETCHWT1-NEXT: prefetcht1 (%eax)
-; PREFETCHWT1-NEXT: prefetcht0 (%eax)
-; PREFETCHWT1-NEXT: prefetchnta (%eax)
-; PREFETCHWT1-NEXT: prefetchwt1 (%eax)
-; PREFETCHWT1-NEXT: prefetchwt1 (%eax)
-; PREFETCHWT1-NEXT: prefetchw (%eax)
-; PREFETCHWT1-NEXT: prefetchwt1 (%eax)
-; PREFETCHWT1-NEXT: retl
+; X86-PREFETCHWT1-LABEL: t:
+; X86-PREFETCHWT1: # %bb.0: # %entry
+; X86-PREFETCHWT1-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-PREFETCHWT1-NEXT: prefetcht2 (%eax)
+; X86-PREFETCHWT1-NEXT: prefetcht1 (%eax)
+; X86-PREFETCHWT1-NEXT: prefetcht0 (%eax)
+; X86-PREFETCHWT1-NEXT: prefetchnta (%eax)
+; X86-PREFETCHWT1-NEXT: prefetchwt1 (%eax)
+; X86-PREFETCHWT1-NEXT: prefetchwt1 (%eax)
+; X86-PREFETCHWT1-NEXT: prefetchw (%eax)
+; X86-PREFETCHWT1-NEXT: prefetchwt1 (%eax)
+; X86-PREFETCHWT1-NEXT: retl
;
-; 3DNOW-LABEL: t:
-; 3DNOW: # %bb.0: # %entry
-; 3DNOW-NEXT: movl {{[0-9]+}}(%esp), %eax
-; 3DNOW-NEXT: prefetch (%eax)
-; 3DNOW-NEXT: prefetch (%eax)
-; 3DNOW-NEXT: prefetch (%eax)
-; 3DNOW-NEXT: prefetch (%eax)
-; 3DNOW-NEXT: prefetchw (%eax)
-; 3DNOW-NEXT: prefetchw (%eax)
-; 3DNOW-NEXT: prefetchw (%eax)
-; 3DNOW-NEXT: prefetchw (%eax)
-; 3DNOW-NEXT: retl
+; X86-3DNOW-LABEL: t:
+; X86-3DNOW: # %bb.0: # %entry
+; X86-3DNOW-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-3DNOW-NEXT: prefetch (%eax)
+; X86-3DNOW-NEXT: prefetch (%eax)
+; X86-3DNOW-NEXT: prefetch (%eax)
+; X86-3DNOW-NEXT: prefetch (%eax)
+; X86-3DNOW-NEXT: prefetchw (%eax)
+; X86-3DNOW-NEXT: prefetchw (%eax)
+; X86-3DNOW-NEXT: prefetchw (%eax)
+; X86-3DNOW-NEXT: prefetchw (%eax)
+; X86-3DNOW-NEXT: retl
entry:
- tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 1, i32 1 )
- tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 2, i32 1 )
- tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 3, i32 1 )
- tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 0, i32 1 )
- tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 1, i32 1 )
- tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 2, i32 1 )
- tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 3, i32 1 )
- tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 0, i32 1 )
- ret void
+ tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 1, i32 1 )
+ tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 2, i32 1 )
+ tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 3, i32 1 )
+ tail call void @llvm.prefetch( ptr %ptr, i32 0, i32 0, i32 1 )
+ tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 1, i32 1 )
+ tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 2, i32 1 )
+ tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 3, i32 1 )
+ tail call void @llvm.prefetch( ptr %ptr, i32 1, i32 0, i32 1 )
+ ret void
}
declare void @llvm.prefetch(ptr, i32, i32, i32) nounwind
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