[llvm] 97418bb - [X86] patchable functions - cleanup check prefixes identified in #92248
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed May 15 06:11:36 PDT 2024
Author: Simon Pilgrim
Date: 2024-05-15T14:11:23+01:00
New Revision: 97418bb519d90542aad3c1f82c80264381a5758e
URL: https://github.com/llvm/llvm-project/commit/97418bb519d90542aad3c1f82c80264381a5758e
DIFF: https://github.com/llvm/llvm-project/commit/97418bb519d90542aad3c1f82c80264381a5758e.diff
LOG: [X86] patchable functions - cleanup check prefixes identified in #92248
Avoid using numbers as check prefix - replace with actual triple config names
Added:
Modified:
llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
llvm/test/CodeGen/X86/patchable-function-entry.ll
llvm/test/CodeGen/X86/patchable-prologue.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll b/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
index d0a9bee7878c3..bcb1106de749e 100644
--- a/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
+++ b/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686 %s -o - | FileCheck --check-prefixes=CHECK,32 %s
-; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,64 %s
+; RUN: llc -mtriple=i686 %s -o - | FileCheck --check-prefixes=CHECK,X86 %s
+; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
;; -fpatchable-function-entry=0 -fcf-protection=branch
define void @f0() "patchable-function-entry"="0" {
@@ -7,8 +7,8 @@ define void @f0() "patchable-function-entry"="0" {
; CHECK-NEXT: .Lfunc_begin0:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: # %bb.0:
-; 32-NEXT: endbr32
-; 64-NEXT: endbr64
+; X86-NEXT: endbr32
+; X64-NEXT: endbr64
; CHECK-NEXT: ret
; CHECK-NOT: .section __patchable_function_entries
ret void
@@ -22,16 +22,16 @@ define void @f1() "patchable-function-entry"="1" {
; CHECK-NEXT: .Lfunc_begin1:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: # %bb.0:
-; 32-NEXT: endbr32
-; 64-NEXT: endbr64
+; X86-NEXT: endbr32
+; X64-NEXT: endbr64
; CHECK-NEXT: .Lpatch0:
; CHECK-NEXT: nop
; CHECK-NEXT: ret
; CHECK: .section __patchable_function_entries,"awo", at progbits,f1{{$}}
-; 32-NEXT: .p2align 2
-; 32-NEXT: .long .Lpatch0
-; 64-NEXT: .p2align 3
-; 64-NEXT: .quad .Lpatch0
+; X86-NEXT: .p2align 2
+; X86-NEXT: .long .Lpatch0
+; X64-NEXT: .p2align 3
+; X64-NEXT: .quad .Lpatch0
ret void
}
@@ -44,17 +44,17 @@ define void @f2_1() "patchable-function-entry"="1" "patchable-function-prefix"="
; CHECK-NEXT: .Lfunc_begin2:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: # %bb.0:
-; 32-NEXT: endbr32
-; 64-NEXT: endbr64
+; X86-NEXT: endbr32
+; X64-NEXT: endbr64
; CHECK-NEXT: nop
; CHECK-NEXT: ret
; CHECK: .Lfunc_end2:
; CHECK-NEXT: .size f2_1, .Lfunc_end2-f2_1
; CHECK: .section __patchable_function_entries,"awo", at progbits,f2_1{{$}}
-; 32-NEXT: .p2align 2
-; 32-NEXT: .long .Ltmp0
-; 64-NEXT: .p2align 3
-; 64-NEXT: .quad .Ltmp0
+; X86-NEXT: .p2align 2
+; X86-NEXT: .long .Ltmp0
+; X64-NEXT: .p2align 3
+; X64-NEXT: .quad .Ltmp0
ret void
}
@@ -74,10 +74,10 @@ define internal void @f1i() "patchable-function-entry"="1" {
;; Another basic block has ENDBR, but it doesn't affect our decision to not create .Lpatch0
; CHECK: endbr
; CHECK: .section __patchable_function_entries,"awo", at progbits,f1i{{$}}
-; 32-NEXT: .p2align 2
-; 32-NEXT: .long .Lfunc_begin3
-; 64-NEXT: .p2align 3
-; 64-NEXT: .quad .Lfunc_begin3
+; X86-NEXT: .p2align 2
+; X86-NEXT: .long .Lfunc_begin3
+; X64-NEXT: .p2align 3
+; X64-NEXT: .quad .Lfunc_begin3
entry:
tail call i32 @llvm.eh.sjlj.setjmp(ptr @buf)
ret void
@@ -93,8 +93,8 @@ entry:
; CHECK-NEXT: .Lfunc_begin{{.*}}:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: # %bb.0:
-; 32-NEXT: endbr32
-; 64-NEXT: endbr64
+; X86-NEXT: endbr32
+; X64-NEXT: endbr64
; CHECK-NEXT: nop
; CHECK-NEXT: ret
define void @sanitize_function(ptr noundef %x) "patchable-function-prefix"="1" "patchable-function-entry"="1" !func_sanitize !1 {
diff --git a/llvm/test/CodeGen/X86/patchable-function-entry.ll b/llvm/test/CodeGen/X86/patchable-function-entry.ll
index 8c37f54510801..54ecd8b1e5daf 100644
--- a/llvm/test/CodeGen/X86/patchable-function-entry.ll
+++ b/llvm/test/CodeGen/X86/patchable-function-entry.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=i386 %s -o - | FileCheck --check-prefixes=CHECK,32 %s
-; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,64 %s
-; RUN: llc -mtriple=x86_64 -function-sections %s -o - | FileCheck --check-prefixes=CHECK,64 %s
+; RUN: llc -mtriple=i386 %s -o - | FileCheck --check-prefixes=CHECK,X86 %s
+; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
+; RUN: llc -mtriple=x86_64 -function-sections %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
define void @f0() "patchable-function-entry"="0" {
; CHECK-LABEL: f0:
@@ -17,10 +17,10 @@ define void @f1() "patchable-function-entry"="1" {
; CHECK: nop
; CHECK-NEXT: ret
; CHECK: .section __patchable_function_entries,"awo", at progbits,f1{{$}}
-; 32: .p2align 2
-; 32-NEXT: .long .Lfunc_begin1
-; 64: .p2align 3
-; 64-NEXT: .quad .Lfunc_begin1
+; X86: .p2align 2
+; X86-NEXT: .long .Lfunc_begin1
+; X64: .p2align 3
+; X64-NEXT: .quad .Lfunc_begin1
ret void
}
@@ -31,14 +31,14 @@ define void @f1() "patchable-function-entry"="1" {
define void @f2() "patchable-function-entry"="2" {
; CHECK-LABEL: f2:
; CHECK-NEXT: .Lfunc_begin2:
-; 32: xchgw %ax, %ax
-; 64: xchgw %ax, %ax
+; X86: xchgw %ax, %ax
+; X64: xchgw %ax, %ax
; CHECK-NEXT: ret
; CHECK: .section __patchable_function_entries,"awo", at progbits,f2{{$}}
-; 32: .p2align 2
-; 32-NEXT: .long .Lfunc_begin2
-; 64: .p2align 3
-; 64-NEXT: .quad .Lfunc_begin2
+; X86: .p2align 2
+; X86-NEXT: .long .Lfunc_begin2
+; X64: .p2align 3
+; X64-NEXT: .quad .Lfunc_begin2
ret void
}
@@ -46,15 +46,15 @@ $f3 = comdat any
define void @f3() "patchable-function-entry"="3" comdat {
; CHECK-LABEL: f3:
; CHECK-NEXT: .Lfunc_begin3:
-; 32: xchgw %ax, %ax
-; 32-NEXT: nop
-; 64: nopl (%rax)
+; X86: xchgw %ax, %ax
+; X86-NEXT: nop
+; X64: nopl (%rax)
; CHECK: ret
; CHECK: .section __patchable_function_entries,"awoG", at progbits,f3,f3,comdat{{$}}
-; 32: .p2align 2
-; 32-NEXT: .long .Lfunc_begin3
-; 64: .p2align 3
-; 64-NEXT: .quad .Lfunc_begin3
+; X86: .p2align 2
+; X86-NEXT: .long .Lfunc_begin3
+; X64: .p2align 3
+; X64-NEXT: .quad .Lfunc_begin3
ret void
}
@@ -62,15 +62,15 @@ $f5 = comdat any
define void @f5() "patchable-function-entry"="5" comdat {
; CHECK-LABEL: f5:
; CHECK-NEXT: .Lfunc_begin4:
-; 32-COUNT-2: xchgw %ax, %ax
-; 32-NEXT: nop
-; 64: nopl 8(%rax,%rax)
+; X86-COUNT-2: xchgw %ax, %ax
+; X86-NEXT: nop
+; X64: nopl 8(%rax,%rax)
; CHECK-NEXT: ret
; CHECK: .section __patchable_function_entries,"awoG", at progbits,f5,f5,comdat{{$}}
-; 32: .p2align 2
-; 32-NEXT: .long .Lfunc_begin4
-; 64: .p2align 3
-; 64-NEXT: .quad .Lfunc_begin4
+; X86: .p2align 2
+; X86-NEXT: .long .Lfunc_begin4
+; X64: .p2align 3
+; X64-NEXT: .quad .Lfunc_begin4
ret void
}
@@ -91,10 +91,10 @@ define void @f3_2() "patchable-function-entry"="1" "patchable-function-prefix"="
; CHECK: .Lfunc_end5:
; CHECK-NEXT: .size f3_2, .Lfunc_end5-f3_2
; CHECK: .section __patchable_function_entries,"awo", at progbits,f3_2{{$}}
-; 32: .p2align 2
-; 32-NEXT: .long .Ltmp0
-; 64: .p2align 3
-; 64-NEXT: .quad .Ltmp0
+; X86: .p2align 2
+; X86-NEXT: .long .Ltmp0
+; X64: .p2align 3
+; X64-NEXT: .quad .Ltmp0
%frame = alloca i8, i32 16
ret void
}
diff --git a/llvm/test/CodeGen/X86/patchable-prologue.ll b/llvm/test/CodeGen/X86/patchable-prologue.ll
index 43761e3d1e1eb..aec76a359d267 100644
--- a/llvm/test/CodeGen/X86/patchable-prologue.ll
+++ b/llvm/test/CodeGen/X86/patchable-prologue.ll
@@ -1,10 +1,10 @@
; RUN: llc -verify-machineinstrs -filetype=obj -o - -mtriple=x86_64-apple-macosx < %s | llvm-objdump --no-print-imm-hex --triple=x86_64-apple-macosx -d - | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx < %s | FileCheck %s --check-prefix=CHECK-ALIGN
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386 < %s | FileCheck %s --check-prefixes=32,32CFI,XCHG
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc < %s | FileCheck %s --check-prefixes=32,MOV
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium3 < %s | FileCheck %s --check-prefixes=32,MOV
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium4 < %s | FileCheck %s --check-prefixes=32,XCHG
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=64
+; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386 < %s | FileCheck %s --check-prefixes=X86,X86CFI,XCHG
+; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc < %s | FileCheck %s --check-prefixes=X86,MOV
+; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium3 < %s | FileCheck %s --check-prefixes=X86,MOV
+; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium4 < %s | FileCheck %s --check-prefixes=X86,XCHG
+; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
declare void @callee(ptr)
@@ -15,18 +15,18 @@ define void @f0() "patchable-function"="prologue-short-redirect" {
; CHECK-ALIGN: .p2align 4, 0x90
; CHECK-ALIGN: _f0:
-; 32: f0:
-; 32CFI-NEXT: .cfi_startproc
-; 32-NEXT: # %bb.0:
+; X86: f0:
+; X86CFI-NEXT: .cfi_startproc
+; X86-NEXT: # %bb.0:
; XCHG-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff]
-; 32-NEXT: retl
+; X86-NEXT: retl
+
+; X64: f0:
+; X64-NEXT: # %bb.0:
+; X64-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
+; X64-NEXT: retq
-; 64: f0:
-; 64-NEXT: # %bb.0:
-; 64-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
-; 64-NEXT: retq
-
ret void
}
@@ -38,19 +38,19 @@ define void @f1() "patchable-function"="prologue-short-redirect" "frame-pointer"
; CHECK-ALIGN: .p2align 4, 0x90
; CHECK-ALIGN: _f1:
-; 32: f1:
-; 32CFI-NEXT: .cfi_startproc
-; 32-NEXT: # %bb.0:
+; X86: f1:
+; X86CFI-NEXT: .cfi_startproc
+; X86-NEXT: # %bb.0:
; XCHG-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff]
-; 32-NEXT: pushl %ebp
-
-; 64: f1:
-; 64-NEXT: .seh_proc f1
-; 64-NEXT: # %bb.0:
-; 64-NEXT: xchgw %ax, %ax
-; 64-NEXT: pushq %rbp
-
+; X86-NEXT: pushl %ebp
+
+; X64: f1:
+; X64-NEXT: .seh_proc f1
+; X64-NEXT: # %bb.0:
+; X64-NEXT: xchgw %ax, %ax
+; X64-NEXT: pushq %rbp
+
ret void
}
@@ -61,18 +61,18 @@ define void @f2() "patchable-function"="prologue-short-redirect" {
; CHECK-ALIGN: .p2align 4, 0x90
; CHECK-ALIGN: _f2:
-; 32: f2:
-; 32CFI-NEXT: .cfi_startproc
-; 32-NEXT: # %bb.0:
+; X86: f2:
+; X86CFI-NEXT: .cfi_startproc
+; X86-NEXT: # %bb.0:
; XCHG-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
; MOV-NEXT: movl %edi, %edi # encoding: [0x8b,0xff]
-; 32-NEXT: pushl %ebp
+; X86-NEXT: pushl %ebp
+
+; X64: f2:
+; X64-NEXT: .seh_proc f2
+; X64-NEXT: # %bb.0:
+; X64-NEXT: subq $200, %rsp
-; 64: f2:
-; 64-NEXT: .seh_proc f2
-; 64-NEXT: # %bb.0:
-; 64-NEXT: subq $200, %rsp
-
%ptr = alloca i64, i32 20
call void @callee(ptr %ptr)
ret void
@@ -85,17 +85,17 @@ define void @f3() "patchable-function"="prologue-short-redirect" optsize {
; CHECK-ALIGN: .p2align 4, 0x90
; CHECK-ALIGN: _f3:
-; 32: f3:
-; 32CFI-NEXT: .cfi_startproc
-; 32-NEXT: # %bb.0:
+; X86: f3:
+; X86CFI-NEXT: .cfi_startproc
+; X86-NEXT: # %bb.0:
; XCHG-NEXT: xchgw %ax, %ax
; MOV-NEXT: movl %edi, %edi
-; 32-NEXT: retl
+; X86-NEXT: retl
-; 64: f3:
-; 64-NEXT: # %bb.0:
-; 64-NEXT: xchgw %ax, %ax
-; 64-NEXT: retq
+; X64: f3:
+; X64-NEXT: # %bb.0:
+; X64-NEXT: xchgw %ax, %ax
+; X64-NEXT: retq
ret void
}
@@ -105,16 +105,16 @@ define void @f3() "patchable-function"="prologue-short-redirect" optsize {
; patchable one.
; CHECK-LABEL: f4{{>?}}:
; CHECK-NEXT: 8b 0c 37 movl (%rdi,%rsi), %ecx
-; 32: f4:
-; 32CFI-NEXT: .cfi_startproc
-; 32-NEXT: # %bb.0:
+; X86: f4:
+; X86CFI-NEXT: .cfi_startproc
+; X86-NEXT: # %bb.0:
; XCHG-NEXT: xchgw %ax, %ax
; MOV-NEXT: movl %edi, %edi
-; 32-NEXT: pushl %ebx
+; X86-NEXT: pushl %ebx
-; 64: f4:
-; 64-NEXT: # %bb.0:
-; 64-NOT: xchgw %ax, %ax
+; X64: f4:
+; X64-NEXT: # %bb.0:
+; X64-NOT: xchgw %ax, %ax
define i32 @f4(ptr %arg1, i64 %arg2, i32 %arg3) "patchable-function"="prologue-short-redirect" {
bb:
@@ -143,15 +143,15 @@ bb21:
; CHECK-ALIGN: .p2align 4, 0x90
; CHECK-ALIGN: _emptyfunc:
-; 32: emptyfunc:
-; 32CFI-NEXT: .cfi_startproc
-; 32-NEXT: # %bb.0:
+; X86: emptyfunc:
+; X86CFI-NEXT: .cfi_startproc
+; X86-NEXT: # %bb.0:
; XCHG-NEXT: xchgw %ax, %ax
; MOV-NEXT: movl %edi, %edi
-; 64: emptyfunc:
-; 64-NEXT: # %bb.0:
-; 64-NEXT: xchgw %ax, %ax
+; X64: emptyfunc:
+; X64-NEXT: # %bb.0:
+; X64-NEXT: xchgw %ax, %ax
; From code: int emptyfunc() {}
define i32 @emptyfunc() "patchable-function"="prologue-short-redirect" {
@@ -169,15 +169,15 @@ define i32 @emptyfunc() "patchable-function"="prologue-short-redirect" {
; CHECK-ALIGN: .p2align 4, 0x90
; CHECK-ALIGN: _jmp_to_start:
-; 32: jmp_to_start:
-; 32CFI-NEXT: .cfi_startproc
-; 32-NEXT: # %bb.0:
+; X86: jmp_to_start:
+; X86CFI-NEXT: .cfi_startproc
+; X86-NEXT: # %bb.0:
; XCHG-NEXT: xchgw %ax, %ax
; MOV-NEXT: movl %edi, %edi
-; 64: jmp_to_start:
-; 64-NEXT: # %bb.0:
-; 64-NEXT: xchgw %ax, %ax
+; X64: jmp_to_start:
+; X64-NEXT: # %bb.0:
+; X64-NEXT: xchgw %ax, %ax
define dso_local void @jmp_to_start(ptr inreg nocapture noundef %b) "patchable-function"="prologue-short-redirect" {
entry:
@@ -198,12 +198,12 @@ do.end: ; preds = %do.body
; Test that inline asm is properly hotpatched. We currently don't examine the
; asm instruction when printing it, thus we always emit patching NOPs.
-; 64: inline_asm:
-; 64-NEXT: # %bb.0:
-; 64-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
-; 64-NEXT: #APP
-; 64-NEXT: int3 # encoding: [0xcc]
-; 64-NEXT: #NO_APP
+; X64: inline_asm:
+; X64-NEXT: # %bb.0:
+; X64-NEXT: xchgw %ax, %ax # encoding: [0x66,0x90]
+; X64-NEXT: #APP
+; X64-NEXT: int3 # encoding: [0xcc]
+; X64-NEXT: #NO_APP
define dso_local void @inline_asm() "patchable-function"="prologue-short-redirect" {
entry:
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