[llvm] 13b265c - [X86][MC] Support Intel FRED and LKGS instructions. (#91909)
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llvm-commits at lists.llvm.org
Tue May 14 19:40:20 PDT 2024
Author: Freddy Ye
Date: 2024-05-15T10:40:16+08:00
New Revision: 13b265c7b5c6a989427639e33893c158f737480b
URL: https://github.com/llvm/llvm-project/commit/13b265c7b5c6a989427639e33893c158f737480b
DIFF: https://github.com/llvm/llvm-project/commit/13b265c7b5c6a989427639e33893c158f737480b.diff
LOG: [X86][MC] Support Intel FRED and LKGS instructions. (#91909)
Spec reference: https://cdrdv2.intel.com/v1/dl/getContent/678938
Added:
llvm/test/MC/Disassembler/X86/fred.txt
llvm/test/MC/Disassembler/X86/lkgs.txt
llvm/test/MC/X86/fred-att.s
llvm/test/MC/X86/fred-intel.s
llvm/test/MC/X86/lkgs-att.s
llvm/test/MC/X86/lkgs-intel.s
Modified:
llvm/lib/Target/X86/X86InstrSystem.td
llvm/test/TableGen/x86-fold-tables.inc
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index 56293e20567ed..e1573b37d4dc2 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -68,6 +68,14 @@ def SYSENTER : I<0x34, RawFrm, (outs), (ins), "sysenter", []>, TB;
def SYSEXIT : I<0x35, RawFrm, (outs), (ins), "sysexit{l}", []>, TB;
def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexitq", []>, TB,
Requires<[In64BitMode]>;
+
+// FRED Instructions
+let hasSideEffects = 1, Defs = [RSP, EFLAGS] in {
+ def ERETS: I<0x01, MRM_CA, (outs), (ins), "erets",
+ []>, TB, XD, Requires<[In64BitMode]>;
+ def ERETU: I<0x01, MRM_CA, (outs), (ins), "eretu",
+ []>, TB, XS, Requires<[In64BitMode]>;
+} // hasSideEffects = 1, Defs = [RSP, EFLAGS]
} // SchedRW
def : Pat<(debugtrap),
@@ -212,6 +220,14 @@ def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
let SchedRW = [WriteSystem] in {
def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", []>, TB;
+// LKGS instructions
+let hasSideEffects = 1 in {
+ let mayLoad = 1 in
+ def LKGS16m : I<0x00, MRM6m, (outs), (ins i16mem:$src), "lkgs\t$src",
+ []>, TB, XD, Requires<[In64BitMode]>;
+ def LKGS16r : I<0x00, MRM6r, (outs), (ins GR16:$src), "lkgs\t$src",
+ []>, TB, XD, Requires<[In64BitMode]>;
+} // hasSideEffects
let Defs = [EFLAGS] in {
let mayLoad = 1 in
diff --git a/llvm/test/MC/Disassembler/X86/fred.txt b/llvm/test/MC/Disassembler/X86/fred.txt
new file mode 100644
index 0000000000000..7a0762e6e4a2d
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/fred.txt
@@ -0,0 +1,8 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64
+
+# CHECK: erets
+0xf2,0x0f,0x01,0xca
+
+# CHECK: eretu
+0xf3,0x0f,0x01,0xca
+
diff --git a/llvm/test/MC/Disassembler/X86/lkgs.txt b/llvm/test/MC/Disassembler/X86/lkgs.txt
new file mode 100644
index 0000000000000..1ad04e5c2ccb2
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/lkgs.txt
@@ -0,0 +1,35 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: lkgs %ax
+# INTEL: lkgs ax
+0xf2,0x0f,0x00,0xf0
+
+# ATT: lkgs %r12w
+# INTEL: lkgs r12w
+0xf2,0x41,0x0f,0x00,0xf4
+
+# ATT: lkgs 268435456(%rbp,%r14,8)
+# INTEL: lkgs word ptr [rbp + 8*r14 + 268435456]
+0xf2,0x42,0x0f,0x00,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: lkgs 291(%r8,%rax,4)
+# INTEL: lkgs word ptr [r8 + 4*rax + 291]
+0xf2,0x41,0x0f,0x00,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: lkgs (%rip)
+# INTEL: lkgs word ptr [rip]
+0xf2,0x0f,0x00,0x35,0x00,0x00,0x00,0x00
+
+# ATT: lkgs -64(,%rbp,2)
+# INTEL: lkgs word ptr [2*rbp - 64]
+0xf2,0x0f,0x00,0x34,0x6d,0xc0,0xff,0xff,0xff
+
+# ATT: lkgs 254(%rcx)
+# INTEL: lkgs word ptr [rcx + 254]
+0xf2,0x0f,0x00,0xb1,0xfe,0x00,0x00,0x00
+
+# ATT: lkgs -256(%rdx)
+# INTEL: lkgs word ptr [rdx - 256]
+0xf2,0x0f,0x00,0xb2,0x00,0xff,0xff,0xff
+
diff --git a/llvm/test/MC/X86/fred-att.s b/llvm/test/MC/X86/fred-att.s
new file mode 100644
index 0000000000000..9eb2aa7555f60
--- /dev/null
+++ b/llvm/test/MC/X86/fred-att.s
@@ -0,0 +1,14 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+// ERROR-COUNT-2: error:
+// ERROR-NOT: error:
+
+// CHECK: erets
+// CHECK: encoding: [0xf2,0x0f,0x01,0xca]
+ erets
+
+// CHECK: eretu
+// CHECK: encoding: [0xf3,0x0f,0x01,0xca]
+ eretu
+
diff --git a/llvm/test/MC/X86/fred-intel.s b/llvm/test/MC/X86/fred-intel.s
new file mode 100644
index 0000000000000..f9175e3c3bba5
--- /dev/null
+++ b/llvm/test/MC/X86/fred-intel.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: erets
+// CHECK: encoding: [0xf2,0x0f,0x01,0xca]
+ erets
+
+// CHECK: eretu
+// CHECK: encoding: [0xf3,0x0f,0x01,0xca]
+ eretu
+
diff --git a/llvm/test/MC/X86/lkgs-att.s b/llvm/test/MC/X86/lkgs-att.s
new file mode 100644
index 0000000000000..e948e2ce559d9
--- /dev/null
+++ b/llvm/test/MC/X86/lkgs-att.s
@@ -0,0 +1,38 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+// ERROR-COUNT-8: error:
+// ERROR-NOT: error:
+
+// CHECK: lkgs %ax
+// CHECK: encoding: [0xf2,0x0f,0x00,0xf0]
+ lkgs %ax
+
+// CHECK: lkgs %r12w
+// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xf4]
+ lkgs %r12w
+
+// CHECK: lkgs 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xf2,0x42,0x0f,0x00,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ lkgs 268435456(%rbp,%r14,8)
+
+// CHECK: lkgs 291(%r8,%rax,4)
+// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xb4,0x80,0x23,0x01,0x00,0x00]
+ lkgs 291(%r8,%rax,4)
+
+// CHECK: lkgs (%rip)
+// CHECK: encoding: [0xf2,0x0f,0x00,0x35,0x00,0x00,0x00,0x00]
+ lkgs (%rip)
+
+// CHECK: lkgs -64(,%rbp,2)
+// CHECK: encoding: [0xf2,0x0f,0x00,0x34,0x6d,0xc0,0xff,0xff,0xff]
+ lkgs -64(,%rbp,2)
+
+// CHECK: lkgs 254(%rcx)
+// CHECK: encoding: [0xf2,0x0f,0x00,0xb1,0xfe,0x00,0x00,0x00]
+ lkgs 254(%rcx)
+
+// CHECK: lkgs -256(%rdx)
+// CHECK: encoding: [0xf2,0x0f,0x00,0xb2,0x00,0xff,0xff,0xff]
+ lkgs -256(%rdx)
+
diff --git a/llvm/test/MC/X86/lkgs-intel.s b/llvm/test/MC/X86/lkgs-intel.s
new file mode 100644
index 0000000000000..bb94eda2b2b97
--- /dev/null
+++ b/llvm/test/MC/X86/lkgs-intel.s
@@ -0,0 +1,34 @@
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: lkgs ax
+// CHECK: encoding: [0xf2,0x0f,0x00,0xf0]
+ lkgs ax
+
+// CHECK: lkgs r12w
+// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xf4]
+ lkgs r12w
+
+// CHECK: lkgs word ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0xf2,0x42,0x0f,0x00,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ lkgs word ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: lkgs word ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xb4,0x80,0x23,0x01,0x00,0x00]
+ lkgs word ptr [r8 + 4*rax + 291]
+
+// CHECK: lkgs word ptr [rip]
+// CHECK: encoding: [0xf2,0x0f,0x00,0x35,0x00,0x00,0x00,0x00]
+ lkgs word ptr [rip]
+
+// CHECK: lkgs word ptr [2*rbp - 64]
+// CHECK: encoding: [0xf2,0x0f,0x00,0x34,0x6d,0xc0,0xff,0xff,0xff]
+ lkgs word ptr [2*rbp - 64]
+
+// CHECK: lkgs word ptr [rcx + 254]
+// CHECK: encoding: [0xf2,0x0f,0x00,0xb1,0xfe,0x00,0x00,0x00]
+ lkgs word ptr [rcx + 254]
+
+// CHECK: lkgs word ptr [rdx - 256]
+// CHECK: encoding: [0xf2,0x0f,0x00,0xb2,0x00,0xff,0xff,0xff]
+ lkgs word ptr [rdx - 256]
+
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index c8f382d45bf6e..4a52a58f2de1c 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -426,6 +426,7 @@ static const X86FoldTableEntry Table0[] = {
{X86::JMP64r, X86::JMP64m, TB_FOLDED_LOAD},
{X86::JMP64r_NT, X86::JMP64m_NT, TB_FOLDED_LOAD},
{X86::JMP64r_REX, X86::JMP64m_REX, TB_FOLDED_LOAD},
+ {X86::LKGS16r, X86::LKGS16m, TB_FOLDED_LOAD},
{X86::MMX_MOVD64from64rr, X86::MMX_MOVQ64mr, TB_FOLDED_STORE},
{X86::MMX_MOVD64grr, X86::MMX_MOVD64mr, TB_FOLDED_STORE},
{X86::MOV16ri, X86::MOV16mi, TB_FOLDED_STORE},
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