[llvm] [AMDGPU][AsmParser][NFC] Eliminate Match_PreferE32. (PR #92159)
via llvm-commits
llvm-commits at lists.llvm.org
Tue May 14 11:33:35 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Ivan Kosarev (kosarev)
<details>
<summary>Changes</summary>
Was added in 88e0b251815563016ad50241dd592e304bc03ee5 and is unused since fcef407aa21ad5a79d66a088e6f2a66a5745725d.
---
Full diff: https://github.com/llvm/llvm-project/pull/92159.diff
1 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (+5-15)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index d47a5f8ebb815..c08c35c459843 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1388,9 +1388,6 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
bool IsAtomic);
public:
- enum AMDGPUMatchResultTy {
- Match_PreferE32 = FIRST_TARGET_MATCH_RESULT_TY
- };
enum OperandMode {
OperandMode_Default,
OperandMode_NSA,
@@ -5262,15 +5259,11 @@ bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
Variant);
// We order match statuses from least to most specific. We use most specific
// status as resulting
- // Match_MnemonicFail < Match_InvalidOperand < Match_MissingFeature < Match_PreferE32
- if ((R == Match_Success) ||
- (R == Match_PreferE32) ||
- (R == Match_MissingFeature && Result != Match_PreferE32) ||
- (R == Match_InvalidOperand && Result != Match_MissingFeature
- && Result != Match_PreferE32) ||
- (R == Match_MnemonicFail && Result != Match_InvalidOperand
- && Result != Match_MissingFeature
- && Result != Match_PreferE32)) {
+ // Match_MnemonicFail < Match_InvalidOperand < Match_MissingFeature
+ if (R == Match_Success || R == Match_MissingFeature ||
+ (R == Match_InvalidOperand && Result != Match_MissingFeature) ||
+ (R == Match_MnemonicFail && Result != Match_InvalidOperand &&
+ Result != Match_MissingFeature)) {
Result = R;
ErrorInfo = EI;
}
@@ -5316,9 +5309,6 @@ bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
return Error(ErrorLoc, "invalid operand for instruction");
}
- case Match_PreferE32:
- return Error(IDLoc, "internal error: instruction without _e64 suffix "
- "should be encoded as e32");
case Match_MnemonicFail:
llvm_unreachable("Invalid instructions should have been handled already");
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/92159
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