[llvm] RISCVAsmParser: Make diagnostics more conventional (PR #92024)
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Tue May 14 10:02:19 PDT 2024
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/92024
>From 34678188b45ab18b911fdf50e4cffdec946022a9 Mon Sep 17 00:00:00 2001
From: Fangrui Song <i at maskray.me>
Date: Mon, 13 May 2024 13:29:05 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
=?UTF-8?q?l=20version?=
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Created using spr 1.3.5-bogner
---
.../Target/RISCV/AsmParser/RISCVAsmParser.cpp | 43 ++-
llvm/test/MC/RISCV/option-invalid.s | 6 +-
.../test/MC/RISCV/rv32xtheadmempair-invalid.s | 8 +-
llvm/test/MC/RISCV/rv32zcmp-invalid.s | 2 +-
.../test/MC/RISCV/rv64xtheadmempair-invalid.s | 12 +-
llvm/test/MC/RISCV/rv64zcmp-invalid.s | 2 +-
llvm/test/MC/RISCV/rvv/invalid.s | 260 +++++++++---------
llvm/test/MC/RISCV/rvv/xsfvcp-invalid.s | 8 +-
llvm/test/MC/RISCV/rvv/zvbb-invalid.s | 6 +-
llvm/test/MC/RISCV/rvv/zvkned-invalid.s | 10 +-
llvm/test/MC/RISCV/rvv/zvknh-invalid.s | 12 +-
llvm/test/MC/RISCV/rvv/zvksed-invalid.s | 2 +-
llvm/test/MC/RISCV/rvv/zvksh-invalid.s | 4 +-
13 files changed, 187 insertions(+), 188 deletions(-)
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 6af1d5010d3a4..d2a23ce6a64f5 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -2829,12 +2829,12 @@ bool RISCVAsmParser::parseDirectiveOption() {
if (isDigit(Arch.back()))
return Error(
- Loc, "Extension version number parsing not currently implemented");
+ Loc, "extension version number parsing not currently implemented");
std::string Feature = RISCVISAInfo::getTargetFeatureForExtension(Arch);
if (!enableExperimentalExtension() &&
StringRef(Feature).starts_with("experimental-"))
- return Error(Loc, "Unexpected experimental extensions.");
+ return Error(Loc, "unexpected experimental extensions");
auto Ext = llvm::lower_bound(RISCVFeatureKV, Feature);
if (Ext == std::end(RISCVFeatureKV) || StringRef(Ext->Key) != Feature)
return Error(Loc, "unknown extension feature");
@@ -2867,9 +2867,9 @@ bool RISCVAsmParser::parseDirectiveOption() {
if (getSTI().hasFeature(Feature.Value) &&
Feature.Implies.test(Ext->Value))
return Error(Loc,
- Twine("Can't disable ") + Ext->Key + " extension, " +
+ Twine("can't disable ") + Ext->Key + " extension; " +
Feature.Key + " extension requires " + Ext->Key +
- " extension be enabled");
+ " extension");
}
clearFeatureBits(Ext->Value, Ext->Key);
@@ -3382,8 +3382,8 @@ bool RISCVAsmParser::validateInstruction(MCInst &Inst,
unsigned TempReg = Inst.getOperand(1).getReg();
if (DestReg == TempReg) {
SMLoc Loc = Operands.back()->getStartLoc();
- return Error(Loc, "The temporary vector register cannot be the same as "
- "the destination register.");
+ return Error(Loc, "the temporary vector register cannot be the same as "
+ "the destination register");
}
}
@@ -3395,8 +3395,7 @@ bool RISCVAsmParser::validateInstruction(MCInst &Inst,
// The encoding with rd1 == rd2 == rs1 is reserved for XTHead load pair.
if (Rs1 == Rd1 && Rs1 == Rd2) {
SMLoc Loc = Operands[1]->getStartLoc();
- return Error(Loc, "The source register and destination registers "
- "cannot be equal.");
+ return Error(Loc, "rs1, rd1, and rd2 cannot all be the same");
}
}
@@ -3405,7 +3404,7 @@ bool RISCVAsmParser::validateInstruction(MCInst &Inst,
unsigned Rd2 = Inst.getOperand(1).getReg();
if (Rd1 == Rd2) {
SMLoc Loc = Operands[1]->getStartLoc();
- return Error(Loc, "'rs1' and 'rs2' must be different.");
+ return Error(Loc, "rs1 and rs2 must be different");
}
}
@@ -3416,10 +3415,10 @@ bool RISCVAsmParser::validateInstruction(MCInst &Inst,
// depending on the data width.
if (IsTHeadMemPair32 && Inst.getOperand(4).getImm() != 3) {
SMLoc Loc = Operands.back()->getStartLoc();
- return Error(Loc, "Operand must be constant 3.");
+ return Error(Loc, "operand must be constant 3");
} else if (IsTHeadMemPair64 && Inst.getOperand(4).getImm() != 4) {
SMLoc Loc = Operands.back()->getStartLoc();
- return Error(Loc, "Operand must be constant 4.");
+ return Error(Loc, "operand must be constant 4");
}
const MCInstrDesc &MCID = MII.get(Opcode);
@@ -3434,14 +3433,14 @@ bool RISCVAsmParser::validateInstruction(MCInst &Inst,
if (MCID.TSFlags & RISCVII::VS1Constraint) {
unsigned VCIXRs1 = Inst.getOperand(Inst.getNumOperands() - 1).getReg();
if (VCIXDst == VCIXRs1)
- return Error(VCIXDstLoc, "The destination vector register group cannot"
- " overlap the source vector register group.");
+ return Error(VCIXDstLoc, "the destination vector register group cannot"
+ " overlap the source vector register group");
}
if (MCID.TSFlags & RISCVII::VS2Constraint) {
unsigned VCIXRs2 = Inst.getOperand(Inst.getNumOperands() - 2).getReg();
if (VCIXDst == VCIXRs2)
- return Error(VCIXDstLoc, "The destination vector register group cannot"
- " overlap the source vector register group.");
+ return Error(VCIXDstLoc, "the destination vector register group cannot"
+ " overlap the source vector register group");
}
return false;
}
@@ -3457,14 +3456,14 @@ bool RISCVAsmParser::validateInstruction(MCInst &Inst,
if (MCID.TSFlags & RISCVII::VS2Constraint) {
unsigned CheckReg = Inst.getOperand(Offset + 1).getReg();
if (DestReg == CheckReg)
- return Error(Loc, "The destination vector register group cannot overlap"
- " the source vector register group.");
+ return Error(Loc, "the destination vector register group cannot overlap"
+ " the source vector register group");
}
if ((MCID.TSFlags & RISCVII::VS1Constraint) && Inst.getOperand(Offset + 2).isReg()) {
unsigned CheckReg = Inst.getOperand(Offset + 2).getReg();
if (DestReg == CheckReg)
- return Error(Loc, "The destination vector register group cannot overlap"
- " the source vector register group.");
+ return Error(Loc, "the destination vector register group cannot overlap"
+ " the source vector register group");
}
if ((MCID.TSFlags & RISCVII::VMConstraint) && (DestReg == RISCV::V0)) {
// vadc, vsbc are special cases. These instructions have no mask register.
@@ -3474,7 +3473,7 @@ bool RISCVAsmParser::validateInstruction(MCInst &Inst,
Opcode == RISCV::VSBC_VXM || Opcode == RISCV::VFMERGE_VFM ||
Opcode == RISCV::VMERGE_VIM || Opcode == RISCV::VMERGE_VVM ||
Opcode == RISCV::VMERGE_VXM)
- return Error(Loc, "The destination vector register group cannot be V0.");
+ return Error(Loc, "the destination vector register group cannot be V0");
// Regardless masked or unmasked version, the number of operands is the
// same. For example, "viota.m v0, v2" is "viota.m v0, v2, NoRegister"
@@ -3485,8 +3484,8 @@ bool RISCVAsmParser::validateInstruction(MCInst &Inst,
"Unexpected register for mask operand");
if (DestReg == CheckReg)
- return Error(Loc, "The destination vector register group cannot overlap"
- " the mask register.");
+ return Error(Loc, "the destination vector register group cannot overlap"
+ " the mask register");
}
return false;
}
diff --git a/llvm/test/MC/RISCV/option-invalid.s b/llvm/test/MC/RISCV/option-invalid.s
index ee520e08746a3..7f6de5f38c528 100644
--- a/llvm/test/MC/RISCV/option-invalid.s
+++ b/llvm/test/MC/RISCV/option-invalid.s
@@ -34,14 +34,14 @@
# CHECK: :[[#@LINE+1]]:18: error: expected comma
.option arch, +c foo
-# CHECK: :[[#@LINE+1]]:16: error: Extension version number parsing not currently implemented
+# CHECK: :[[#@LINE+1]]:16: error: extension version number parsing not currently implemented
.option arch, +c2p0
.option arch, +d
-# CHECK: :[[#@LINE+1]]:16: error: Can't disable f extension, d extension requires f extension be enabled
+# CHECK: :[[#@LINE+1]]:16: error: can't disable f extension; d extension requires f extension
.option arch, -f
-# CHECK: :[[#@LINE+1]]:16: error: Can't disable zicsr extension, f extension requires zicsr extension be enabled
+# CHECK: :[[#@LINE+1]]:16: error: can't disable zicsr extension; f extension requires zicsr extension
.option arch, -zicsr
# CHECK: :[[#@LINE+1]]:20: error: 'f' and 'zfinx' extensions are incompatible
diff --git a/llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s b/llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s
index 94319dea1c170..9124218c1f8f5 100644
--- a/llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s
+++ b/llvm/test/MC/RISCV/rv32xtheadmempair-invalid.s
@@ -8,13 +8,13 @@ th.sdd a0, a1, (a2) # CHECK: [[@LINE]]:1: error: too few operands for in
th.sdd a0, a1, (a2), 3, 5 # CHECK: [[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
th.lwud t0, t1, (t2), 5, 4 # CHECK: [[@LINE]]:23: error: immediate must be an integer in the range [0, 3]
th.lwud t0, t1, (t2) # CHECK: [[@LINE]]:1: error: too few operands for instruction
-th.lwud t0, t1, (t2), 3, 5 # CHECK: [[@LINE]]:26: error: Operand must be constant 3.
+th.lwud t0, t1, (t2), 3, 5 # CHECK: [[@LINE]]:26: error: operand must be constant 3
th.lwd a3, a4, (a5), 5, 4 # CHECK: [[@LINE]]:22: error: immediate must be an integer in the range [0, 3]
th.lwd a3, a4, (a5) # CHECK: [[@LINE]]:1: error: too few operands for instruction
-th.lwd a3, a4, (a5), 3, 5 # CHECK: [[@LINE]]:25: error: Operand must be constant 3.
+th.lwd a3, a4, (a5), 3, 5 # CHECK: [[@LINE]]:25: error: operand must be constant 3
th.swd t3, t4, (t5), 5, 4 # CHECK: [[@LINE]]:22: error: immediate must be an integer in the range [0, 3]
th.swd t3, t4, (t5) # CHECK: [[@LINE]]:1: error: too few operands for instruction
-th.swd t3, t4, (t5), 3, 5 # CHECK: [[@LINE]]:25: error: Operand must be constant 3.
-th.lwud x6, x6, (x6), 2, 3 # CHECK: [[@LINE]]:9: error: The source register and destination registers cannot be equal.
+th.swd t3, t4, (t5), 3, 5 # CHECK: [[@LINE]]:25: error: operand must be constant 3
+th.lwud x6, x6, (x6), 2, 3 # CHECK: [[@LINE]]:9: error: rs1, rd1, and rd2 cannot all be the same
th.ldd t0, t1, (t2), 2, 4 # CHECK: [[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
th.sdd t0, t1, (t2), 2, 4 # CHECK: [[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
diff --git a/llvm/test/MC/RISCV/rv32zcmp-invalid.s b/llvm/test/MC/RISCV/rv32zcmp-invalid.s
index 1acea187585f8..2ed82bc55be3f 100644
--- a/llvm/test/MC/RISCV/rv32zcmp-invalid.s
+++ b/llvm/test/MC/RISCV/rv32zcmp-invalid.s
@@ -4,7 +4,7 @@
# CHECK-ERROR: error: invalid operand for instruction
cm.mvsa01 a1, a2
-# CHECK-ERROR: error: 'rs1' and 'rs2' must be different
+# CHECK-ERROR: error: rs1 and rs2 must be different
cm.mvsa01 s0, s0
# CHECK-ERROR: error: invalid operand for instruction
diff --git a/llvm/test/MC/RISCV/rv64xtheadmempair-invalid.s b/llvm/test/MC/RISCV/rv64xtheadmempair-invalid.s
index cf56a1fcccaf8..342db21bbca62 100644
--- a/llvm/test/MC/RISCV/rv64xtheadmempair-invalid.s
+++ b/llvm/test/MC/RISCV/rv64xtheadmempair-invalid.s
@@ -2,17 +2,17 @@
th.ldd t0, t1, (t2), 5, 4 # CHECK: [[@LINE]]:22: error: immediate must be an integer in the range [0, 3]
th.ldd t0, t1, (t2) # CHECK: [[@LINE]]:1: error: too few operands for instruction
-th.ldd t0, t1, (t2), 3, 5 # CHECK: [[@LINE]]:25: error: Operand must be constant 4.
+th.ldd t0, t1, (t2), 3, 5 # CHECK: [[@LINE]]:25: error: operand must be constant 4
th.sdd a0, a1, (a2), 5, 4 # CHECK: [[@LINE]]:22: error: immediate must be an integer in the range [0, 3]
th.sdd a0, a1, (a2) # CHECK: [[@LINE]]:1: error: too few operands for instruction
-th.sdd a0, a1, (a2), 3, 5 # CHECK: [[@LINE]]:25: error: Operand must be constant 4.
+th.sdd a0, a1, (a2), 3, 5 # CHECK: [[@LINE]]:25: error: operand must be constant 4
th.lwud t0, t1, (t2), 5, 4 # CHECK: [[@LINE]]:23: error: immediate must be an integer in the range [0, 3]
th.lwud t0, t1, (t2) # CHECK: [[@LINE]]:1: error: too few operands for instruction
-th.lwud t0, t1, (t2), 3, 5 # CHECK: [[@LINE]]:26: error: Operand must be constant 3.
+th.lwud t0, t1, (t2), 3, 5 # CHECK: [[@LINE]]:26: error: operand must be constant 3
th.lwd a3, a4, (a5), 5, 4 # CHECK: [[@LINE]]:22: error: immediate must be an integer in the range [0, 3]
th.lwd a3, a4, (a5) # CHECK: [[@LINE]]:1: error: too few operands for instruction
-th.lwd a3, a4, (a5), 3, 5 # CHECK: [[@LINE]]:25: error: Operand must be constant 3.
+th.lwd a3, a4, (a5), 3, 5 # CHECK: [[@LINE]]:25: error: operand must be constant 3
th.swd t3, t4, (t5), 5, 4 # CHECK: [[@LINE]]:22: error: immediate must be an integer in the range [0, 3]
th.swd t3, t4, (t5) # CHECK: [[@LINE]]:1: error: too few operands for instruction
-th.swd t3, t4, (t5), 3, 5 # CHECK: [[@LINE]]:25: error: Operand must be constant 3.
-th.lwud x6, x6, (x6), 2, 3 # CHECK: [[@LINE]]:9: error: The source register and destination registers cannot be equal.
+th.swd t3, t4, (t5), 3, 5 # CHECK: [[@LINE]]:25: error: operand must be constant 3
+th.lwud x6, x6, (x6), 2, 3 # CHECK: [[@LINE]]:9: error: rs1, rd1, and rd2 cannot all be the same
diff --git a/llvm/test/MC/RISCV/rv64zcmp-invalid.s b/llvm/test/MC/RISCV/rv64zcmp-invalid.s
index bf34554095ea5..8f353e8a7bb47 100644
--- a/llvm/test/MC/RISCV/rv64zcmp-invalid.s
+++ b/llvm/test/MC/RISCV/rv64zcmp-invalid.s
@@ -4,7 +4,7 @@
# CHECK-ERROR: error: invalid operand for instruction
cm.mvsa01 a1, a2
-# CHECK-ERROR: error: 'rs1' and 'rs2' must be different
+# CHECK-ERROR: error: rs1 and rs2 must be different
cm.mvsa01 s0, s0
# CHECK-ERROR: error: invalid operand for instruction
diff --git a/llvm/test/MC/RISCV/rvv/invalid.s b/llvm/test/MC/RISCV/rvv/invalid.s
index 09fd2c3bebf03..8c50f7ed048ca 100644
--- a/llvm/test/MC/RISCV/rvv/invalid.s
+++ b/llvm/test/MC/RISCV/rvv/invalid.s
@@ -96,471 +96,471 @@ vmslt.vi v1, v2, 17
# CHECK-ERROR: immediate must be in the range [-15, 16]
viota.m v0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: viota.m v0, v2, v0.t
viota.m v2, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: viota.m v2, v2
vfwcvt.xu.f.v v0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwcvt.xu.f.v v0, v2, v0.t
vfwcvt.xu.f.v v2, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwcvt.xu.f.v v2, v2
vfwcvt.x.f.v v0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwcvt.x.f.v v0, v2, v0.t
vfwcvt.x.f.v v2, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwcvt.x.f.v v2, v2
vfwcvt.f.xu.v v0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwcvt.f.xu.v v0, v2, v0.t
vfwcvt.f.xu.v v2, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwcvt.f.xu.v v2, v2
vfwcvt.f.x.v v0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwcvt.f.x.v v0, v2, v0.t
vfwcvt.f.x.v v2, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwcvt.f.x.v v2, v2
vfwcvt.f.f.v v0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwcvt.f.f.v v0, v2, v0.t
vfwcvt.f.f.v v2, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwcvt.f.f.v v2, v2
vslideup.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vslideup.vx v0, v2, a0, v0.t
vslideup.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vslideup.vx v2, v2, a0
vslideup.vi v0, v2, 31, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vslideup.vi v0, v2, 31, v0.t
vslideup.vi v2, v2, 31
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vslideup.vi v2, v2, 31
vslide1up.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vslide1up.vx v0, v2, a0, v0.t
vslide1up.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vslide1up.vx v2, v2, a0
vrgather.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vrgather.vv v0, v2, v4, v0.t
vrgather.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vrgather.vv v2, v2, v4
vrgather.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vrgather.vx v0, v2, a0, v0.t
vrgather.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vrgather.vx v2, v2, a0
vrgather.vi v0, v2, 31, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vrgather.vi v0, v2, 31, v0.t
vrgather.vi v2, v2, 31
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vrgather.vi v2, v2, 31
vwaddu.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwaddu.vv v0, v2, v4, v0.t
vwaddu.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwaddu.vv v2, v2, v4
vwsubu.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwsubu.vv v0, v2, v4, v0.t
vwsubu.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsubu.vv v2, v2, v4
vwadd.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwadd.vv v0, v2, v4, v0.t
vwadd.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwadd.vv v2, v2, v4
vwsub.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwsub.vv v0, v2, v4, v0.t
vwsub.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsub.vv v2, v2, v4
vwmul.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmul.vv v0, v2, v4, v0.t
vwmul.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmul.vv v2, v2, v4
vwmulu.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmulu.vv v0, v2, v4, v0.t
vwmulu.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmulu.vv v2, v2, v4
vwmulsu.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmulsu.vv v0, v2, v4, v0.t
vwmulsu.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmulsu.vv v2, v2, v4
vwmaccu.vv v0, v4, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmaccu.vv v0, v4, v2, v0.t
vwmaccu.vv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmaccu.vv v2, v4, v2
vwmacc.vv v0, v4, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmacc.vv v0, v4, v2, v0.t
vwmacc.vv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmacc.vv v2, v4, v2
vwmaccsu.vv v0, v4, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmaccsu.vv v0, v4, v2, v0.t
vwmaccsu.vv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmaccsu.vv v2, v4, v2
vfwadd.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwadd.vv v0, v2, v4, v0.t
vfwadd.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwadd.vv v2, v2, v4
vfwsub.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwsub.vv v0, v2, v4, v0.t
vfwsub.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwsub.vv v2, v2, v4
vfwmul.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwmul.vv v0, v2, v4, v0.t
vfwmul.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwmul.vv v2, v2, v4
vfwmacc.vv v0, v4, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwmacc.vv v0, v4, v2, v0.t
vfwmacc.vv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwmacc.vv v2, v4, v2
vfwnmacc.vv v0, v4, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwnmacc.vv v0, v4, v2, v0.t
vfwnmacc.vv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwnmacc.vv v2, v4, v2
vfwmsac.vv v0, v4, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwmsac.vv v0, v4, v2, v0.t
vfwmsac.vv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwmsac.vv v2, v4, v2
vfwnmsac.vv v0, v4, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwnmsac.vv v0, v4, v2, v0.t
vfwnmsac.vv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwnmsac.vv v2, v4, v2
vwaddu.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwaddu.vx v0, v2, a0, v0.t
vwaddu.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwaddu.vx v2, v2, a0
vwsubu.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwsubu.vx v0, v2, a0, v0.t
vwsubu.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsubu.vx v2, v2, a0
vwadd.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwadd.vx v0, v2, a0, v0.t
vwadd.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwadd.vx v2, v2, a0
vwsub.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwsub.vx v0, v2, a0, v0.t
vwsub.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsub.vx v2, v2, a0
vwmul.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmul.vx v0, v2, a0, v0.t
vwmul.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmul.vx v2, v2, a0
vwmulu.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmulu.vx v0, v2, a0, v0.t
vwmulu.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmulu.vx v2, v2, a0
vwmulsu.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmulsu.vx v0, v2, a0, v0.t
vwmulsu.vx v2, v2, a0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmulsu.vx v2, v2, a0
vwmaccu.vx v0, a0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmaccu.vx v0, a0, v2, v0.t
vwmaccu.vx v2, a0, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmaccu.vx v2, a0, v2
vwmacc.vx v0, a0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmacc.vx v0, a0, v2, v0.t
vwmacc.vx v2, a0, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmacc.vx v2, a0, v2
vwmaccsu.vx v0, a0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmaccsu.vx v0, a0, v2, v0.t
vwmaccsu.vx v2, a0, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmaccsu.vx v2, a0, v2
vwmaccus.vx v0, a0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwmaccus.vx v0, a0, v2, v0.t
vwmaccus.vx v2, a0, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwmaccus.vx v2, a0, v2
vfwadd.vf v0, v2, fa0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwadd.vf v0, v2, fa0, v0.t
vfwadd.vf v2, v2, fa0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwadd.vf v2, v2, fa0
vfwsub.vf v0, v2, fa0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwsub.vf v0, v2, fa0, v0.t
vfwsub.vf v2, v2, fa0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwsub.vf v2, v2, fa0
vfwmul.vf v0, v2, fa0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwmul.vf v0, v2, fa0, v0.t
vfwmul.vf v2, v2, fa0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwmul.vf v2, v2, fa0
vfwmacc.vf v0, fa0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwmacc.vf v0, fa0, v2, v0.t
vfwmacc.vf v2, fa0, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwmacc.vf v2, fa0, v2
vfwnmacc.vf v0, fa0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwnmacc.vf v0, fa0, v2, v0.t
vfwnmacc.vf v2, fa0, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwnmacc.vf v2, fa0, v2
vfwmsac.vf v0, fa0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwmsac.vf v0, fa0, v2, v0.t
vfwmsac.vf v2, fa0, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwmsac.vf v2, fa0, v2
vfwnmsac.vf v0, fa0, v2, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwnmsac.vf v0, fa0, v2, v0.t
vfwnmsac.vf v2, fa0, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwnmsac.vf v2, fa0, v2
vcompress.vm v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vcompress.vm v2, v2, v4
vwaddu.wv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwaddu.wv v0, v2, v4, v0.t
vwaddu.wv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwaddu.wv v2, v4, v2
vwsubu.wv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwsubu.wv v0, v2, v4, v0.t
vwsubu.wv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsubu.wv v2, v4, v2
vwadd.wv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwadd.wv v0, v2, v4, v0.t
vwadd.wv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwadd.wv v2, v4, v2
vwsub.wv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwsub.wv v0, v2, v4, v0.t
vwsub.wv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsub.wv v2, v4, v2
vfwadd.wv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwadd.wv v0, v2, v4, v0.t
vfwadd.wv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwadd.wv v2, v4, v2
vfwsub.wv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwsub.wv v0, v2, v4, v0.t
vfwsub.wv v2, v4, v2
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vfwsub.wv v2, v4, v2
vwaddu.wx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwaddu.wx v0, v2, a0, v0.t
vwsubu.wx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwsubu.wx v0, v2, a0, v0.t
vwadd.wx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwadd.wx v0, v2, a0, v0.t
vwsub.wx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vwsub.wx v0, v2, a0, v0.t
vfwadd.wf v0, v2, fa0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwadd.wf v0, v2, fa0, v0.t
vfwsub.wf v0, v2, fa0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfwsub.wf v0, v2, fa0, v0.t
vadc.vvm v0, v2, v4, v0
-# CHECK-ERROR: The destination vector register group cannot be V0.
+# CHECK-ERROR: the destination vector register group cannot be V0
# CHECK-ERROR-LABEL: vadc.vvm v0, v2, v4, v0
vadd.vv v0, v2, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vadd.vv v0, v2, v4, v0.t
vadd.vx v0, v2, a0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vadd.vx v0, v2, a0, v0.t
vadd.vi v0, v2, 1, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vadd.vi v0, v2, 1, v0.t
vmsge.vx v0, v4, a0, v0.t
@@ -568,47 +568,47 @@ vmsge.vx v0, v4, a0, v0.t
# CHECK-ERROR-LABEL: vmsge.vx v0, v4, a0, v0.t
vmerge.vim v0, v1, 1, v0
-# CHECK-ERROR: The destination vector register group cannot be V0.
+# CHECK-ERROR: the destination vector register group cannot be V0
# CHECK-ERROR-LABEL: vmerge.vim v0, v1, 1, v0
vmerge.vvm v0, v1, v2, v0
-# CHECK-ERROR: The destination vector register group cannot be V0.
+# CHECK-ERROR: the destination vector register group cannot be V0
# CHECK-ERROR-LABEL: vmerge.vvm v0, v1, v2, v0
vmerge.vxm v0, v1, x1, v0
-# CHECK-ERROR: The destination vector register group cannot be V0.
+# CHECK-ERROR: the destination vector register group cannot be V0
# CHECK-ERROR-LABEL: vmerge.vxm v0, v1, x1, v0
vfmerge.vfm v0, v1, f1, v0
-# CHECK-ERROR: The destination vector register group cannot be V0.
+# CHECK-ERROR: the destination vector register group cannot be V0
# CHECK-ERROR-LABEL: vfmerge.vfm v0, v1, f1, v0
vle8.v v0, (a0), v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vle8.v v0, (a0), v0.t
vfclass.v v0, v1, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfclass.v v0, v1, v0.t
vfsqrt.v v0, v1, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfsqrt.v v0, v1, v0.t
vzext.vf2 v0, v1, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vzext.vf2 v0, v1, v0.t
vid.v v0, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vid.v v0, v0.t
vnsrl.wv v0, v4, v20, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vnsrl.wv v0, v4, v20, v0.t
vfncvt.xu.f.w v0, v4, v0.t
-# CHECK-ERROR: The destination vector register group cannot overlap the mask register.
+# CHECK-ERROR: the destination vector register group cannot overlap the mask register
# CHECK-ERROR-LABEL: vfncvt.xu.f.w v0, v4, v0.t
vl2re8.v v1, (a0)
@@ -750,7 +750,7 @@ vmsgeu.vx v2, v4, a0, v0.t, v0
# CHECK-ERROR: invalid operand for instruction
vmsge.vx v2, v4, a0, v0.t, v2
-# CHECK-ERROR: The temporary vector register cannot be the same as the destination register.
+# CHECK-ERROR: the temporary vector register cannot be the same as the destination register
vmsgeu.vx v2, v4, a0, v0.t, v2
-# CHECK-ERROR: The temporary vector register cannot be the same as the destination register.
+# CHECK-ERROR: the temporary vector register cannot be the same as the destination register
diff --git a/llvm/test/MC/RISCV/rvv/xsfvcp-invalid.s b/llvm/test/MC/RISCV/rvv/xsfvcp-invalid.s
index 52dc32b8c6a8d..9ba2a8d2f7294 100644
--- a/llvm/test/MC/RISCV/rvv/xsfvcp-invalid.s
+++ b/llvm/test/MC/RISCV/rvv/xsfvcp-invalid.s
@@ -4,17 +4,17 @@
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
sf.vc.v.vvw 0x3, v0, v2, v0
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.{{$}}
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group{{$}}
# CHECK-ERROR-LABEL: sf.vc.v.vvw 0x3, v0, v2, v0{{$}}
sf.vc.v.xvw 0x3, v0, v0, a1
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.{{$}}
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group{{$}}
# CHECK-ERROR-LABEL: sf.vc.v.xvw 0x3, v0, v0, a1{{$}}
sf.vc.v.ivw 0x3, v0, v0, 15
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.{{$}}
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group{{$}}
# CHECK-ERROR-LABEL: sf.vc.v.ivw 0x3, v0, v0, 15{{$}}
sf.vc.v.fvw 0x1, v0, v0, fa1
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.{{$}}
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group{{$}}
# CHECK-ERROR-LABEL: sf.vc.v.fvw 0x1, v0, v0, fa1{{$}}
diff --git a/llvm/test/MC/RISCV/rvv/zvbb-invalid.s b/llvm/test/MC/RISCV/rvv/zvbb-invalid.s
index ca581de02fd60..42113c3c0ffe8 100644
--- a/llvm/test/MC/RISCV/rvv/zvbb-invalid.s
+++ b/llvm/test/MC/RISCV/rvv/zvbb-invalid.s
@@ -2,13 +2,13 @@
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
vwsll.vv v2, v2, v4
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsll.vv v2, v2, v4
vwsll.vx v2, v2, x10
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsll.vx v2, v2, x10
vwsll.vi v2, v2, 1
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vwsll.vi v2, v2, 1
diff --git a/llvm/test/MC/RISCV/rvv/zvkned-invalid.s b/llvm/test/MC/RISCV/rvv/zvkned-invalid.s
index 9230bc08e3fa2..2d57a2816980d 100644
--- a/llvm/test/MC/RISCV/rvv/zvkned-invalid.s
+++ b/llvm/test/MC/RISCV/rvv/zvkned-invalid.s
@@ -2,22 +2,22 @@
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
vaesdf.vs v10, v10
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vaesdf.vs v10, v10
vaesef.vs v11, v11
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vaesef.vs v11, v11
vaesdm.vs v12, v12
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vaesdm.vs v12, v12
vaesem.vs v13, v13
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vaesem.vs v13, v13
vaesz.vs v14, v14
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vaesz.vs v14, v14
diff --git a/llvm/test/MC/RISCV/rvv/zvknh-invalid.s b/llvm/test/MC/RISCV/rvv/zvknh-invalid.s
index d9902511c0e10..f5c9ee57ff78a 100644
--- a/llvm/test/MC/RISCV/rvv/zvknh-invalid.s
+++ b/llvm/test/MC/RISCV/rvv/zvknh-invalid.s
@@ -2,25 +2,25 @@
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
vsha2ms.vv v10, v10, v11
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsha2ms.vv v10, v10, v11
vsha2ms.vv v11, v10, v11
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsha2ms.vv v11, v10, v11
vsha2ch.vv v12, v12, v11
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsha2ch.vv v12, v12, v11
vsha2ch.vv v11, v12, v11
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsha2ch.vv v11, v12, v11
vsha2cl.vv v13, v13, v15
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsha2cl.vv v13, v13, v15
vsha2cl.vv v15, v13, v15
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsha2cl.vv v15, v13, v15
diff --git a/llvm/test/MC/RISCV/rvv/zvksed-invalid.s b/llvm/test/MC/RISCV/rvv/zvksed-invalid.s
index 41df8d3bc2961..0f348a2ca5ad1 100644
--- a/llvm/test/MC/RISCV/rvv/zvksed-invalid.s
+++ b/llvm/test/MC/RISCV/rvv/zvksed-invalid.s
@@ -2,5 +2,5 @@
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
vsm4r.vs v10, v10
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsm4r.vs v10, v10
diff --git a/llvm/test/MC/RISCV/rvv/zvksh-invalid.s b/llvm/test/MC/RISCV/rvv/zvksh-invalid.s
index cccec44b81919..27a11ed9b969f 100644
--- a/llvm/test/MC/RISCV/rvv/zvksh-invalid.s
+++ b/llvm/test/MC/RISCV/rvv/zvksh-invalid.s
@@ -2,9 +2,9 @@
# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
vsm3me.vv v10, v10, v8
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsm3me.vv v10, v10, v8
vsm3c.vi v9, v9, 7
-# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR: the destination vector register group cannot overlap the source vector register group
# CHECK-ERROR-LABEL: vsm3c.vi v9, v9, 7
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