[llvm] [WIP][DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)

[Simon Pilgrim via llvm-commits]

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@@ -4752,6 +4752,19 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
         (VTBits - SignBitsOp0 + 1) + (VTBits - SignBitsOp1 + 1);
     return OutValidBits > VTBits ? 1 : VTBits - OutValidBits + 1;
   }
+  case ISD::AVGCEILS:
+  case ISD::AVGFLOORS:
+    // Treat the AVG nodes like ADD/SUB nodes as that's the only stage that
+    // can lose sign bits:
+    // avgceils(lhs, rhs) -> sub(or(lhs,rhs),ashr(xor(lhs,rhs),1))
+    // avgfloors(lhs, rhs) -> add(and(lhs,rhs),ashr(xor(lhs,rhs),1))
+    Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1);
+    if (Tmp == 1)
+      break; // Early out.
+    Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth + 1);
+    if (Tmp2 == 1)
+      break; // Early out.
+    return std::min(Tmp, Tmp2) - 1;
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RKSimon wrote:

Not exhaustive, but random fuzzing suggests we can use `std::min(Tmp,Tmp2)` - https://godbolt.org/z/Trx1986rj

https://github.com/llvm/llvm-project/pull/92096