[llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)
Freddy Ye via llvm-commits
llvm-commits at lists.llvm.org
Mon May 13 17:57:49 PDT 2024
https://github.com/FreddyLeaf updated https://github.com/llvm/llvm-project/pull/91909
>From 286270a193c985319c68f976ded40c51308951af Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Sat, 11 May 2024 16:42:51 +0800
Subject: [PATCH 1/6] [X86][MC] Support Intel FRED and LKGS instructions.
Spec reference: https://cdrdv2.intel.com/v1/dl/getContent/678938
---
llvm/lib/Target/X86/X86InstrSystem.td | 12 +++++++
llvm/test/MC/Disassembler/X86/x86-64-fred.txt | 8 +++++
llvm/test/MC/Disassembler/X86/x86-64-lkgs.txt | 35 +++++++++++++++++++
llvm/test/MC/X86/x86-64-fred-att.s | 10 ++++++
llvm/test/MC/X86/x86-64-fred-intel.s | 10 ++++++
llvm/test/MC/X86/x86-64-lkgs-att.s | 34 ++++++++++++++++++
llvm/test/MC/X86/x86-64-lkgs-intel.s | 34 ++++++++++++++++++
llvm/test/TableGen/x86-fold-tables.inc | 1 +
8 files changed, 144 insertions(+)
create mode 100644 llvm/test/MC/Disassembler/X86/x86-64-fred.txt
create mode 100644 llvm/test/MC/Disassembler/X86/x86-64-lkgs.txt
create mode 100644 llvm/test/MC/X86/x86-64-fred-att.s
create mode 100644 llvm/test/MC/X86/x86-64-fred-intel.s
create mode 100644 llvm/test/MC/X86/x86-64-lkgs-att.s
create mode 100644 llvm/test/MC/X86/x86-64-lkgs-intel.s
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index 56293e20567ed..a89a6f86eb7df 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -68,6 +68,12 @@ def SYSENTER : I<0x34, RawFrm, (outs), (ins), "sysenter", []>, TB;
def SYSEXIT : I<0x35, RawFrm, (outs), (ins), "sysexit{l}", []>, TB;
def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexitq", []>, TB,
Requires<[In64BitMode]>;
+
+// FRED Instructions
+def ERETS: I<0x01, MRM_CA, (outs), (ins), "erets",
+ []>, TB, XD, Requires<[In64BitMode]>;
+def ERETU: I<0x01, MRM_CA, (outs), (ins), "eretu",
+ []>, TB, XS, Requires<[In64BitMode]>;
} // SchedRW
def : Pat<(debugtrap),
@@ -212,6 +218,12 @@ def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
let SchedRW = [WriteSystem] in {
def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", []>, TB;
+// LKGS instructions
+let mayLoad = 1 in
+def LKGS16m : I<0x00, MRM6m, (outs), (ins i16mem:$src), "lkgs{w}\t$src",
+ []>, TB, XD, Requires<[In64BitMode]>;
+def LKGS16r : I<0x00, MRM6r, (outs), (ins GR16:$src), "lkgs{w}\t$src",
+ []>, TB, XD, Requires<[In64BitMode]>;
let Defs = [EFLAGS] in {
let mayLoad = 1 in
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-fred.txt b/llvm/test/MC/Disassembler/X86/x86-64-fred.txt
new file mode 100644
index 0000000000000..7a0762e6e4a2d
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/x86-64-fred.txt
@@ -0,0 +1,8 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64
+
+# CHECK: erets
+0xf2,0x0f,0x01,0xca
+
+# CHECK: eretu
+0xf3,0x0f,0x01,0xca
+
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-lkgs.txt b/llvm/test/MC/Disassembler/X86/x86-64-lkgs.txt
new file mode 100644
index 0000000000000..e8d40213d1bf3
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/x86-64-lkgs.txt
@@ -0,0 +1,35 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: lkgsw %ax
+# INTEL: lkgs ax
+0xf2,0x0f,0x00,0xf0
+
+# ATT: lkgsw %r12w
+# INTEL: lkgs r12w
+0xf2,0x41,0x0f,0x00,0xf4
+
+# ATT: lkgsw 268435456(%rbp,%r14,8)
+# INTEL: lkgs word ptr [rbp + 8*r14 + 268435456]
+0xf2,0x42,0x0f,0x00,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: lkgsw 291(%r8,%rax,4)
+# INTEL: lkgs word ptr [r8 + 4*rax + 291]
+0xf2,0x41,0x0f,0x00,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: lkgsw (%rip)
+# INTEL: lkgs word ptr [rip]
+0xf2,0x0f,0x00,0x35,0x00,0x00,0x00,0x00
+
+# ATT: lkgsw -64(,%rbp,2)
+# INTEL: lkgs word ptr [2*rbp - 64]
+0xf2,0x0f,0x00,0x34,0x6d,0xc0,0xff,0xff,0xff
+
+# ATT: lkgsw 254(%rcx)
+# INTEL: lkgs word ptr [rcx + 254]
+0xf2,0x0f,0x00,0xb1,0xfe,0x00,0x00,0x00
+
+# ATT: lkgsw -256(%rdx)
+# INTEL: lkgs word ptr [rdx - 256]
+0xf2,0x0f,0x00,0xb2,0x00,0xff,0xff,0xff
+
diff --git a/llvm/test/MC/X86/x86-64-fred-att.s b/llvm/test/MC/X86/x86-64-fred-att.s
new file mode 100644
index 0000000000000..29cc070a60840
--- /dev/null
+++ b/llvm/test/MC/X86/x86-64-fred-att.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+// CHECK: erets
+// CHECK: encoding: [0xf2,0x0f,0x01,0xca]
+ erets
+
+// CHECK: eretu
+// CHECK: encoding: [0xf3,0x0f,0x01,0xca]
+ eretu
+
diff --git a/llvm/test/MC/X86/x86-64-fred-intel.s b/llvm/test/MC/X86/x86-64-fred-intel.s
new file mode 100644
index 0000000000000..f9175e3c3bba5
--- /dev/null
+++ b/llvm/test/MC/X86/x86-64-fred-intel.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: erets
+// CHECK: encoding: [0xf2,0x0f,0x01,0xca]
+ erets
+
+// CHECK: eretu
+// CHECK: encoding: [0xf3,0x0f,0x01,0xca]
+ eretu
+
diff --git a/llvm/test/MC/X86/x86-64-lkgs-att.s b/llvm/test/MC/X86/x86-64-lkgs-att.s
new file mode 100644
index 0000000000000..692ebc0c25cf1
--- /dev/null
+++ b/llvm/test/MC/X86/x86-64-lkgs-att.s
@@ -0,0 +1,34 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+// CHECK: lkgsw %ax
+// CHECK: encoding: [0xf2,0x0f,0x00,0xf0]
+ lkgsw %ax
+
+// CHECK: lkgsw %r12w
+// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xf4]
+ lkgsw %r12w
+
+// CHECK: lkgsw 268435456(%rbp,%r14,8)
+// CHECK: encoding: [0xf2,0x42,0x0f,0x00,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ lkgsw 268435456(%rbp,%r14,8)
+
+// CHECK: lkgsw 291(%r8,%rax,4)
+// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xb4,0x80,0x23,0x01,0x00,0x00]
+ lkgsw 291(%r8,%rax,4)
+
+// CHECK: lkgsw (%rip)
+// CHECK: encoding: [0xf2,0x0f,0x00,0x35,0x00,0x00,0x00,0x00]
+ lkgsw (%rip)
+
+// CHECK: lkgsw -64(,%rbp,2)
+// CHECK: encoding: [0xf2,0x0f,0x00,0x34,0x6d,0xc0,0xff,0xff,0xff]
+ lkgsw -64(,%rbp,2)
+
+// CHECK: lkgsw 254(%rcx)
+// CHECK: encoding: [0xf2,0x0f,0x00,0xb1,0xfe,0x00,0x00,0x00]
+ lkgsw 254(%rcx)
+
+// CHECK: lkgsw -256(%rdx)
+// CHECK: encoding: [0xf2,0x0f,0x00,0xb2,0x00,0xff,0xff,0xff]
+ lkgsw -256(%rdx)
+
diff --git a/llvm/test/MC/X86/x86-64-lkgs-intel.s b/llvm/test/MC/X86/x86-64-lkgs-intel.s
new file mode 100644
index 0000000000000..bb94eda2b2b97
--- /dev/null
+++ b/llvm/test/MC/X86/x86-64-lkgs-intel.s
@@ -0,0 +1,34 @@
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: lkgs ax
+// CHECK: encoding: [0xf2,0x0f,0x00,0xf0]
+ lkgs ax
+
+// CHECK: lkgs r12w
+// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xf4]
+ lkgs r12w
+
+// CHECK: lkgs word ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0xf2,0x42,0x0f,0x00,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ lkgs word ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: lkgs word ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xb4,0x80,0x23,0x01,0x00,0x00]
+ lkgs word ptr [r8 + 4*rax + 291]
+
+// CHECK: lkgs word ptr [rip]
+// CHECK: encoding: [0xf2,0x0f,0x00,0x35,0x00,0x00,0x00,0x00]
+ lkgs word ptr [rip]
+
+// CHECK: lkgs word ptr [2*rbp - 64]
+// CHECK: encoding: [0xf2,0x0f,0x00,0x34,0x6d,0xc0,0xff,0xff,0xff]
+ lkgs word ptr [2*rbp - 64]
+
+// CHECK: lkgs word ptr [rcx + 254]
+// CHECK: encoding: [0xf2,0x0f,0x00,0xb1,0xfe,0x00,0x00,0x00]
+ lkgs word ptr [rcx + 254]
+
+// CHECK: lkgs word ptr [rdx - 256]
+// CHECK: encoding: [0xf2,0x0f,0x00,0xb2,0x00,0xff,0xff,0xff]
+ lkgs word ptr [rdx - 256]
+
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index c8f382d45bf6e..4a52a58f2de1c 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -426,6 +426,7 @@ static const X86FoldTableEntry Table0[] = {
{X86::JMP64r, X86::JMP64m, TB_FOLDED_LOAD},
{X86::JMP64r_NT, X86::JMP64m_NT, TB_FOLDED_LOAD},
{X86::JMP64r_REX, X86::JMP64m_REX, TB_FOLDED_LOAD},
+ {X86::LKGS16r, X86::LKGS16m, TB_FOLDED_LOAD},
{X86::MMX_MOVD64from64rr, X86::MMX_MOVQ64mr, TB_FOLDED_STORE},
{X86::MMX_MOVD64grr, X86::MMX_MOVD64mr, TB_FOLDED_STORE},
{X86::MOV16ri, X86::MOV16mi, TB_FOLDED_STORE},
>From 0c6410e012eea7629a91796d32aaf5bd35391356 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Mon, 13 May 2024 15:23:17 +0800
Subject: [PATCH 2/6] address comments.
---
llvm/lib/Target/X86/X86InstrSystem.td | 22 +++++++++++--------
.../MC/X86/{x86-64-fred-att.s => fred-att.s} | 4 ++++
.../X86/{x86-64-fred-intel.s => fred-intel.s} | 0
.../MC/X86/{x86-64-lkgs-att.s => lkgs-att.s} | 4 ++++
.../X86/{x86-64-lkgs-intel.s => lkgs-intel.s} | 0
5 files changed, 21 insertions(+), 9 deletions(-)
rename llvm/test/MC/X86/{x86-64-fred-att.s => fred-att.s} (60%)
rename llvm/test/MC/X86/{x86-64-fred-intel.s => fred-intel.s} (100%)
rename llvm/test/MC/X86/{x86-64-lkgs-att.s => lkgs-att.s} (87%)
rename llvm/test/MC/X86/{x86-64-lkgs-intel.s => lkgs-intel.s} (100%)
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index a89a6f86eb7df..adcbccf068c5a 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -70,10 +70,12 @@ def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexitq", []>, TB,
Requires<[In64BitMode]>;
// FRED Instructions
-def ERETS: I<0x01, MRM_CA, (outs), (ins), "erets",
- []>, TB, XD, Requires<[In64BitMode]>;
-def ERETU: I<0x01, MRM_CA, (outs), (ins), "eretu",
- []>, TB, XS, Requires<[In64BitMode]>;
+let hasSideEffects = 1 in {
+ def ERETS: I<0x01, MRM_CA, (outs), (ins), "erets",
+ []>, TB, XD, Requires<[In64BitMode]>;
+ def ERETU: I<0x01, MRM_CA, (outs), (ins), "eretu",
+ []>, TB, XS, Requires<[In64BitMode]>;
+} // hasSideEffects = 1
} // SchedRW
def : Pat<(debugtrap),
@@ -219,11 +221,13 @@ def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
let SchedRW = [WriteSystem] in {
def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", []>, TB;
// LKGS instructions
-let mayLoad = 1 in
-def LKGS16m : I<0x00, MRM6m, (outs), (ins i16mem:$src), "lkgs{w}\t$src",
- []>, TB, XD, Requires<[In64BitMode]>;
-def LKGS16r : I<0x00, MRM6r, (outs), (ins GR16:$src), "lkgs{w}\t$src",
- []>, TB, XD, Requires<[In64BitMode]>;
+let hasSideEffects = 1 in {
+ let mayLoad = 1 in
+ def LKGS16m : I<0x00, MRM6m, (outs), (ins i16mem:$src), "lkgs{w}\t$src",
+ []>, TB, XD, Requires<[In64BitMode]>;
+ def LKGS16r : I<0x00, MRM6r, (outs), (ins GR16:$src), "lkgs{w}\t$src",
+ []>, TB, XD, Requires<[In64BitMode]>;
+} // hasSideEffects
let Defs = [EFLAGS] in {
let mayLoad = 1 in
diff --git a/llvm/test/MC/X86/x86-64-fred-att.s b/llvm/test/MC/X86/fred-att.s
similarity index 60%
rename from llvm/test/MC/X86/x86-64-fred-att.s
rename to llvm/test/MC/X86/fred-att.s
index 29cc070a60840..9eb2aa7555f60 100644
--- a/llvm/test/MC/X86/x86-64-fred-att.s
+++ b/llvm/test/MC/X86/fred-att.s
@@ -1,4 +1,8 @@
// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+// ERROR-COUNT-2: error:
+// ERROR-NOT: error:
// CHECK: erets
// CHECK: encoding: [0xf2,0x0f,0x01,0xca]
diff --git a/llvm/test/MC/X86/x86-64-fred-intel.s b/llvm/test/MC/X86/fred-intel.s
similarity index 100%
rename from llvm/test/MC/X86/x86-64-fred-intel.s
rename to llvm/test/MC/X86/fred-intel.s
diff --git a/llvm/test/MC/X86/x86-64-lkgs-att.s b/llvm/test/MC/X86/lkgs-att.s
similarity index 87%
rename from llvm/test/MC/X86/x86-64-lkgs-att.s
rename to llvm/test/MC/X86/lkgs-att.s
index 692ebc0c25cf1..9aec443a5b57b 100644
--- a/llvm/test/MC/X86/x86-64-lkgs-att.s
+++ b/llvm/test/MC/X86/lkgs-att.s
@@ -1,4 +1,8 @@
// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+// RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+// ERROR-COUNT-8: error:
+// ERROR-NOT: error:
// CHECK: lkgsw %ax
// CHECK: encoding: [0xf2,0x0f,0x00,0xf0]
diff --git a/llvm/test/MC/X86/x86-64-lkgs-intel.s b/llvm/test/MC/X86/lkgs-intel.s
similarity index 100%
rename from llvm/test/MC/X86/x86-64-lkgs-intel.s
rename to llvm/test/MC/X86/lkgs-intel.s
>From 5eec20774aacc9598e24246edaa52242f4f34140 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Mon, 13 May 2024 15:28:13 +0800
Subject: [PATCH 3/6] address cont.
---
llvm/test/MC/Disassembler/X86/{x86-64-fred.txt => fred.txt} | 0
llvm/test/MC/Disassembler/X86/{x86-64-lkgs.txt => lkgs.txt} | 0
2 files changed, 0 insertions(+), 0 deletions(-)
rename llvm/test/MC/Disassembler/X86/{x86-64-fred.txt => fred.txt} (100%)
rename llvm/test/MC/Disassembler/X86/{x86-64-lkgs.txt => lkgs.txt} (100%)
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-fred.txt b/llvm/test/MC/Disassembler/X86/fred.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/X86/x86-64-fred.txt
rename to llvm/test/MC/Disassembler/X86/fred.txt
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-lkgs.txt b/llvm/test/MC/Disassembler/X86/lkgs.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/X86/x86-64-lkgs.txt
rename to llvm/test/MC/Disassembler/X86/lkgs.txt
>From 382fec944c86529e1273fb53bdcbe210647ab27b Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Mon, 13 May 2024 16:55:59 +0800
Subject: [PATCH 4/6] address comments.
---
llvm/lib/Target/X86/X86InstrSystem.td | 4 ++--
llvm/test/MC/Disassembler/X86/lkgs.txt | 16 ++++++-------
llvm/test/MC/X86/lkgs-att.s | 32 +++++++++++++-------------
3 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index adcbccf068c5a..ecb0d6dc37ca1 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -223,9 +223,9 @@ def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", []>, TB;
// LKGS instructions
let hasSideEffects = 1 in {
let mayLoad = 1 in
- def LKGS16m : I<0x00, MRM6m, (outs), (ins i16mem:$src), "lkgs{w}\t$src",
+ def LKGS16m : I<0x00, MRM6m, (outs), (ins i16mem:$src), "lkgs\t$src",
[]>, TB, XD, Requires<[In64BitMode]>;
- def LKGS16r : I<0x00, MRM6r, (outs), (ins GR16:$src), "lkgs{w}\t$src",
+ def LKGS16r : I<0x00, MRM6r, (outs), (ins GR16:$src), "lkgs\t$src",
[]>, TB, XD, Requires<[In64BitMode]>;
} // hasSideEffects
diff --git a/llvm/test/MC/Disassembler/X86/lkgs.txt b/llvm/test/MC/Disassembler/X86/lkgs.txt
index e8d40213d1bf3..1ad04e5c2ccb2 100644
--- a/llvm/test/MC/Disassembler/X86/lkgs.txt
+++ b/llvm/test/MC/Disassembler/X86/lkgs.txt
@@ -1,35 +1,35 @@
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-# ATT: lkgsw %ax
+# ATT: lkgs %ax
# INTEL: lkgs ax
0xf2,0x0f,0x00,0xf0
-# ATT: lkgsw %r12w
+# ATT: lkgs %r12w
# INTEL: lkgs r12w
0xf2,0x41,0x0f,0x00,0xf4
-# ATT: lkgsw 268435456(%rbp,%r14,8)
+# ATT: lkgs 268435456(%rbp,%r14,8)
# INTEL: lkgs word ptr [rbp + 8*r14 + 268435456]
0xf2,0x42,0x0f,0x00,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: lkgsw 291(%r8,%rax,4)
+# ATT: lkgs 291(%r8,%rax,4)
# INTEL: lkgs word ptr [r8 + 4*rax + 291]
0xf2,0x41,0x0f,0x00,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: lkgsw (%rip)
+# ATT: lkgs (%rip)
# INTEL: lkgs word ptr [rip]
0xf2,0x0f,0x00,0x35,0x00,0x00,0x00,0x00
-# ATT: lkgsw -64(,%rbp,2)
+# ATT: lkgs -64(,%rbp,2)
# INTEL: lkgs word ptr [2*rbp - 64]
0xf2,0x0f,0x00,0x34,0x6d,0xc0,0xff,0xff,0xff
-# ATT: lkgsw 254(%rcx)
+# ATT: lkgs 254(%rcx)
# INTEL: lkgs word ptr [rcx + 254]
0xf2,0x0f,0x00,0xb1,0xfe,0x00,0x00,0x00
-# ATT: lkgsw -256(%rdx)
+# ATT: lkgs -256(%rdx)
# INTEL: lkgs word ptr [rdx - 256]
0xf2,0x0f,0x00,0xb2,0x00,0xff,0xff,0xff
diff --git a/llvm/test/MC/X86/lkgs-att.s b/llvm/test/MC/X86/lkgs-att.s
index 9aec443a5b57b..e948e2ce559d9 100644
--- a/llvm/test/MC/X86/lkgs-att.s
+++ b/llvm/test/MC/X86/lkgs-att.s
@@ -4,35 +4,35 @@
// ERROR-COUNT-8: error:
// ERROR-NOT: error:
-// CHECK: lkgsw %ax
+// CHECK: lkgs %ax
// CHECK: encoding: [0xf2,0x0f,0x00,0xf0]
- lkgsw %ax
+ lkgs %ax
-// CHECK: lkgsw %r12w
+// CHECK: lkgs %r12w
// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xf4]
- lkgsw %r12w
+ lkgs %r12w
-// CHECK: lkgsw 268435456(%rbp,%r14,8)
+// CHECK: lkgs 268435456(%rbp,%r14,8)
// CHECK: encoding: [0xf2,0x42,0x0f,0x00,0xb4,0xf5,0x00,0x00,0x00,0x10]
- lkgsw 268435456(%rbp,%r14,8)
+ lkgs 268435456(%rbp,%r14,8)
-// CHECK: lkgsw 291(%r8,%rax,4)
+// CHECK: lkgs 291(%r8,%rax,4)
// CHECK: encoding: [0xf2,0x41,0x0f,0x00,0xb4,0x80,0x23,0x01,0x00,0x00]
- lkgsw 291(%r8,%rax,4)
+ lkgs 291(%r8,%rax,4)
-// CHECK: lkgsw (%rip)
+// CHECK: lkgs (%rip)
// CHECK: encoding: [0xf2,0x0f,0x00,0x35,0x00,0x00,0x00,0x00]
- lkgsw (%rip)
+ lkgs (%rip)
-// CHECK: lkgsw -64(,%rbp,2)
+// CHECK: lkgs -64(,%rbp,2)
// CHECK: encoding: [0xf2,0x0f,0x00,0x34,0x6d,0xc0,0xff,0xff,0xff]
- lkgsw -64(,%rbp,2)
+ lkgs -64(,%rbp,2)
-// CHECK: lkgsw 254(%rcx)
+// CHECK: lkgs 254(%rcx)
// CHECK: encoding: [0xf2,0x0f,0x00,0xb1,0xfe,0x00,0x00,0x00]
- lkgsw 254(%rcx)
+ lkgs 254(%rcx)
-// CHECK: lkgsw -256(%rdx)
+// CHECK: lkgs -256(%rdx)
// CHECK: encoding: [0xf2,0x0f,0x00,0xb2,0x00,0xff,0xff,0xff]
- lkgsw -256(%rdx)
+ lkgs -256(%rdx)
>From 4336dec6b427e7abe955845e2d84e49362f4be53 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Tue, 14 May 2024 08:35:17 +0800
Subject: [PATCH 5/6] address
---
llvm/lib/Target/X86/X86InstrSystem.td | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index ecb0d6dc37ca1..db1c25f1220ab 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -70,7 +70,7 @@ def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexitq", []>, TB,
Requires<[In64BitMode]>;
// FRED Instructions
-let hasSideEffects = 1 in {
+let hasSideEffects = 1, Defs = [ESP, EFLAGS] in {
def ERETS: I<0x01, MRM_CA, (outs), (ins), "erets",
[]>, TB, XD, Requires<[In64BitMode]>;
def ERETU: I<0x01, MRM_CA, (outs), (ins), "eretu",
>From 8ffce7ed2368a14d30e43b5d87b94de356f37686 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Tue, 14 May 2024 08:57:34 +0800
Subject: [PATCH 6/6] refine
---
llvm/lib/Target/X86/X86InstrSystem.td | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index db1c25f1220ab..e1573b37d4dc2 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -70,12 +70,12 @@ def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexitq", []>, TB,
Requires<[In64BitMode]>;
// FRED Instructions
-let hasSideEffects = 1, Defs = [ESP, EFLAGS] in {
+let hasSideEffects = 1, Defs = [RSP, EFLAGS] in {
def ERETS: I<0x01, MRM_CA, (outs), (ins), "erets",
[]>, TB, XD, Requires<[In64BitMode]>;
def ERETU: I<0x01, MRM_CA, (outs), (ins), "eretu",
[]>, TB, XS, Requires<[In64BitMode]>;
-} // hasSideEffects = 1
+} // hasSideEffects = 1, Defs = [RSP, EFLAGS]
} // SchedRW
def : Pat<(debugtrap),
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