[llvm] [NVPTX] support immediate values in st.param instructions (PR #91523)

[Artem Belevich via llvm-commits]

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@@ -2637,25 +2637,49 @@ class LoadParamRegInst<NVPTXRegClass regclass, string opstr> :
                 [(set regclass:$dst, (LoadParam (i32 0), (i32 imm:$b)))]>;
 
 let mayStore = true in {
-  class StoreParamInst<NVPTXRegClass regclass, string opstr> :
+  class StoreParamInstReg<NVPTXRegClass regclass, string opstr> :
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Artem-B wrote:

Considering that those `_i` and `_r` records carry no pattern, having an unused record will not hurt, it will remain unused, unless someone explicitly refers to those records. If you want to make 100% sure it's never used, you can add an argument, and add an always-false predicate to the `_i` variant if it's set.

If it's too much of a hassle, the code is OK as is, functionally, just looks a bit odd to me.  I would expect _i and _r to be defined very similarly, yet one is defined directly, and another via a separate class. It kind of begs to be straightened out -- define _i and _r the same way, either directly, or via the same external class, parametrized accordingly. Direct use of NVPTXInst looks the simplest choice here. Defining a few unused instruction variants is OK -- we have tons of them, already, due to the quirkiness of tensorcore instructions.

I'll leave it up to you. 


https://github.com/llvm/llvm-project/pull/91523