[llvm] [llvm] Support fixed point multiplication on AArch64 (PR #84237)
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Mon May 13 14:08:45 PDT 2024
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@@ -0,0 +1,146 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
+
+declare i4 @llvm.umul.fix.sat.i4 (i4, i4, i32)
+declare i32 @llvm.umul.fix.sat.i32 (i32, i32, i32)
+declare i64 @llvm.umul.fix.sat.i64 (i64, i64, i32)
+
+define i32 @func(i32 %x, i32 %y) nounwind {
+; CHECK-LABEL: func:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umull x8, w0, w1
+; CHECK-NEXT: lsr x9, x8, #32
+; CHECK-NEXT: extr w8, w9, w8, #2
+; CHECK-NEXT: cmp w9, #3
+; CHECK-NEXT: csinv w0, w8, wzr, ls
+; CHECK-NEXT: ret
+ %tmp = call i32 @llvm.umul.fix.sat.i32(i32 %x, i32 %y, i32 2)
+ ret i32 %tmp
+}
+
+define i64 @func2(i64 %x, i64 %y) nounwind {
+; CHECK-LABEL: func2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mul x8, x0, x1
+; CHECK-NEXT: umulh x9, x0, x1
+; CHECK-NEXT: extr x8, x9, x8, #2
+; CHECK-NEXT: cmp x9, #3
+; CHECK-NEXT: csinv x0, x8, xzr, ls
+; CHECK-NEXT: ret
+ %tmp = call i64 @llvm.umul.fix.sat.i64(i64 %x, i64 %y, i32 2)
+ ret i64 %tmp
+}
+
+define i4 @func3(i4 %x, i4 %y) nounwind {
+; CHECK-LABEL: func3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w8, w0, #28
+; CHECK-NEXT: and w9, w1, #0xf
+; CHECK-NEXT: umull x8, w8, w9
+; CHECK-NEXT: lsr x9, x8, #32
+; CHECK-NEXT: extr w8, w9, w8, #2
+; CHECK-NEXT: cmp w9, #3
+; CHECK-NEXT: csinv w8, w8, wzr, ls
+; CHECK-NEXT: lsr w0, w8, #28
+; CHECK-NEXT: ret
+ %tmp = call i4 @llvm.umul.fix.sat.i4(i4 %x, i4 %y, i32 2)
+ ret i4 %tmp
+}
+
+;; These result in regular integer multiplication with a saturation check.
+define i32 @func4(i32 %x, i32 %y) nounwind {
+; CHECK-LABEL: func4:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umull x8, w0, w1
+; CHECK-NEXT: tst x8, #0xffffffff00000000
+; CHECK-NEXT: csinv w0, w8, wzr, eq
+; CHECK-NEXT: ret
+ %tmp = call i32 @llvm.umul.fix.sat.i32(i32 %x, i32 %y, i32 0)
+ ret i32 %tmp
+}
+
+define i64 @func5(i64 %x, i64 %y) {
+; CHECK-LABEL: func5:
+; CHECK: // %bb.0:
+; CHECK-NEXT: umulh x8, x0, x1
+; CHECK-NEXT: mul x9, x0, x1
+; CHECK-NEXT: cmp xzr, x8
+; CHECK-NEXT: csinv x0, x9, xzr, eq
+; CHECK-NEXT: ret
+ %tmp = call i64 @llvm.umul.fix.sat.i64(i64 %x, i64 %y, i32 0)
+ ret i64 %tmp
+}
+
+define i4 @func6(i4 %x, i4 %y) nounwind {
+; CHECK-LABEL: func6:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w8, w0, #28
+; CHECK-NEXT: and w9, w1, #0xf
+; CHECK-NEXT: umull x8, w8, w9
+; CHECK-NEXT: tst x8, #0xffffffff00000000
+; CHECK-NEXT: csinv w8, w8, wzr, eq
+; CHECK-NEXT: lsr w0, w8, #28
+; CHECK-NEXT: ret
+ %tmp = call i4 @llvm.umul.fix.sat.i4(i4 %x, i4 %y, i32 0)
+ ret i4 %tmp
+}
+
+define <4 x i32> @vec2(<4 x i32> %x, <4 x i32> %y) nounwind {
----------------
PiJoules wrote:
Added
https://github.com/llvm/llvm-project/pull/84237
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