[llvm] [TableGen][SubtargetEmitter] Refactor hasReadOfWrite to take ProcMode… (PR #92032)

[Michael Maitland via llvm-commits]

https://github.com/michaelmaitland created https://github.com/llvm/llvm-project/pull/92032

…l argument

SubtargetEmitter::GenSchedClassTables takes a CodeGenProcModel, but calls hasReadOfWrite which loops over all ProcModels. We overload hasReadOfWrite to have a version that return true if the given write record is referenced by a ReadAdvance for the specified ProcModel. This leads to a 144% speedup on the RISC-V backend of our downstream.

This patch is purley performance related has no impact on the final generated code.

>From 453db2ec5d6e636fb68895e63e36baa03fafdb6c Mon Sep 17 00:00:00 2001
From: Michael Maitland <michaeltmaitland at gmail.com>
Date: Mon, 13 May 2024 14:01:25 -0700
Subject: [PATCH] [TableGen][SubtargetEmitter] Refactor hasReadOfWrite to take
 ProcModel argument

SubtargetEmitter::GenSchedClassTables takes a CodeGenProcModel, but
calls hasReadOfWrite which loops over all ProcModels. We overload hasReadOfWrite
to have a version that return true if the given write record is referenced by a
ReadAdvance for the specified ProcModel. This leads to a 144% speedup on
the RISC-V backend of our downstream.

This patch is purley performance related has no impact on the final generated
code.
---
 .../utils/TableGen/Common/CodeGenSchedule.cpp | 22 ++++++++++++-------
 llvm/utils/TableGen/Common/CodeGenSchedule.h  |  8 ++++++-
 llvm/utils/TableGen/SubtargetEmitter.cpp      |  4 ++--
 3 files changed, 23 insertions(+), 11 deletions(-)

diff --git a/llvm/utils/TableGen/Common/CodeGenSchedule.cpp b/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
index 0e81623a6aa38..da5038d947b09 100644
--- a/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
@@ -746,18 +746,24 @@ unsigned CodeGenSchedModels::getSchedRWIdx(const Record *Def,
   return I == RWVec.end() ? 0 : std::distance(RWVec.begin(), I);
 }
 
-bool CodeGenSchedModels::hasReadOfWrite(Record *WriteDef) const {
-  for (auto &ProcModel : ProcModels) {
-    const RecVec &RADefs = ProcModel.ReadAdvanceDefs;
-    for (auto &RADef : RADefs) {
-      RecVec ValidWrites = RADef->getValueAsListOfDefs("ValidWrites");
-      if (is_contained(ValidWrites, WriteDef))
-        return true;
-    }
+bool CodeGenSchedModels::hasReadOfWrite(
+    Record *WriteDef, const CodeGenProcModel &ProcModel) const {
+  const RecVec &RADefs = ProcModel.ReadAdvanceDefs;
+  for (auto &RADef : RADefs) {
+    RecVec ValidWrites = RADef->getValueAsListOfDefs("ValidWrites");
+    if (is_contained(ValidWrites, WriteDef))
+      return true;
   }
   return false;
 }
 
+bool CodeGenSchedModels::hasReadOfWrite(Record *WriteDef) const {
+  for (auto &ProcModel : ProcModels)
+    if (hasReadOfWrite(WriteDef, ProcModel))
+      return true;
+  return false;
+}
+
 static void splitSchedReadWrites(const RecVec &RWDefs, RecVec &WriteDefs,
                                  RecVec &ReadDefs) {
   for (Record *RWDef : RWDefs) {
diff --git a/llvm/utils/TableGen/Common/CodeGenSchedule.h b/llvm/utils/TableGen/Common/CodeGenSchedule.h
index 61980e7e196e5..f73b691421a08 100644
--- a/llvm/utils/TableGen/Common/CodeGenSchedule.h
+++ b/llvm/utils/TableGen/Common/CodeGenSchedule.h
@@ -536,7 +536,13 @@ class CodeGenSchedModels {
 
   unsigned getSchedRWIdx(const Record *Def, bool IsRead) const;
 
-  // Return true if the given write record is referenced by a ReadAdvance.
+  // Return true if the given write record is referenced by a ReadAdvance for
+  // the specified ProcModel.
+  bool hasReadOfWrite(Record *WriteDef,
+                      const CodeGenProcModel &ProcModel) const;
+
+  // Return true if the given write record is referenced by a ReadAdvance by any
+  // ProcModel.
   bool hasReadOfWrite(Record *WriteDef) const;
 
   // Get a SchedClass from its index.
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index b6b7641cfb929..5b2a196a3ad74 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -1122,8 +1122,8 @@ void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
       WriterNames.push_back(SchedModels.getSchedWrite(WriteID).Name);
       // If this Write is not referenced by a ReadAdvance, don't distinguish it
       // from other WriteLatency entries.
-      if (!SchedModels.hasReadOfWrite(
-              SchedModels.getSchedWrite(WriteID).TheDef)) {
+      if (!SchedModels.hasReadOfWrite(SchedModels.getSchedWrite(WriteID).TheDef,
+                                      ProcModel)) {
         WriteID = 0;
       }
       WLEntry.WriteResourceID = WriteID;