[llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)

[Florian Hahn via llvm-commits]

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@@ -1852,7 +1852,15 @@ bool AArch64TargetLowering::shouldExpandGetActiveLaneMask(EVT ResVT,
 }
 
 bool AArch64TargetLowering::shouldExpandCttzElements(EVT VT) const {
-  return !Subtarget->hasSVEorSME() || VT != MVT::nxv16i1;
+  if (!Subtarget->hasSVEorSME())
+    return true;
+
+  // We can only use the BRKB + CNTP sequence with legal predicate types.
+  if (VT != MVT::nxv16i1 && VT != MVT::nxv8i1 && VT != MVT::nxv4i1 &&
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fhahn wrote:

Thanks!

https://github.com/llvm/llvm-project/pull/91505