[llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)

[Phoebe Wang via llvm-commits]

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@@ -212,6 +220,14 @@ def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
 
 let SchedRW = [WriteSystem] in {
 def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", []>, TB;
+// LKGS instructions
+let hasSideEffects = 1 in {
+  let mayLoad = 1 in
+  def LKGS16m : I<0x00, MRM6m, (outs), (ins i16mem:$src), "lkgs{w}\t$src",
+                  []>, TB, XD, Requires<[In64BitMode]>;
+  def LKGS16r : I<0x00, MRM6r, (outs), (ins GR16:$src), "lkgs{w}\t$src",
+                  []>, TB, XD, Requires<[In64BitMode]>;
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phoebewang wrote:

If no other different memory/register size variant, we prefer to not adding the suffix.

https://github.com/llvm/llvm-project/pull/91909