[llvm] [InstCombine] Remove one-use requirement for add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN (PR #90509)
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Sun May 5 19:41:47 PDT 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/90509
>From c09ce9a95bfd89464eb08e191cfc70831ac16b1d Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Thu, 2 May 2024 13:31:20 -0400
Subject: [PATCH 1/2] [InstCombine] Pre-commit tests (NFC)
---
llvm/test/Transforms/InstCombine/add.ll | 43 +++++++++++++++++--------
1 file changed, 30 insertions(+), 13 deletions(-)
diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 56ee54d351e762..66aaac3ab0c60c 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -1435,11 +1435,26 @@ define i32 @and31_add_sexts(i1 %x, i1 %y) {
ret i32 %r
}
-; Negative test - extra use
-
define i32 @lshr_add_use_sexts(i1 %x, i1 %y, ptr %p) {
; CHECK-LABEL: @lshr_add_use_sexts(
; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32
+; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32
+; CHECK-NEXT: store i32 [[YS]], ptr [[P:%.*]], align 4
+; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]]
+; CHECK-NEXT: [[R:%.*]] = lshr i32 [[SUB]], 31
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %xs = sext i1 %x to i32
+ %ys = sext i1 %y to i32
+ store i32 %ys, ptr %p
+ %sub = add i32 %xs, %ys
+ %r = lshr i32 %sub, 31
+ ret i32 %r
+}
+
+define i32 @lshr_add_use_sexts_2(i1 %x, i1 %y, ptr %p) {
+; CHECK-LABEL: @lshr_add_use_sexts_2(
+; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32
; CHECK-NEXT: store i32 [[XS]], ptr [[P:%.*]], align 4
; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]]
@@ -1456,18 +1471,20 @@ define i32 @lshr_add_use_sexts(i1 %x, i1 %y, ptr %p) {
; Negative test - extra use
-define i32 @lshr_add_use2_sexts(i1 %x, i1 %y, ptr %p) {
-; CHECK-LABEL: @lshr_add_use2_sexts(
+declare void @use_sexts(i32, i32)
+
+define i32 @lshr_add_use_sexts_both(i1 %x, i1 %y) {
+; CHECK-LABEL: @lshr_add_use_sexts_both(
; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32
; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32
-; CHECK-NEXT: store i32 [[YS]], ptr [[P:%.*]], align 4
+; CHECK-NEXT: call void @use_sexts(i32 [[XS]], i32 [[YS]])
; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]]
; CHECK-NEXT: [[R:%.*]] = lshr i32 [[SUB]], 31
; CHECK-NEXT: ret i32 [[R]]
;
%xs = sext i1 %x to i32
%ys = sext i1 %y to i32
- store i32 %ys, ptr %p
+ call void @use_sexts(i32 %xs, i32 %ys)
%sub = add i32 %xs, %ys
%r = lshr i32 %sub, 31
ret i32 %r
@@ -4018,8 +4035,8 @@ define i32 @add_reduce_sqr_sum_varC_invalid2(i32 %a, i32 %b) {
define i32 @fold_sext_addition_or_disjoint(i8 %x) {
; CHECK-LABEL: @fold_sext_addition_or_disjoint(
-; CHECK-NEXT: [[SE:%.*]] = sext i8 [[XX:%.*]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], 1246
+; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[TMP1]], 1246
; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 12
@@ -4043,8 +4060,8 @@ define i32 @fold_sext_addition_fail(i8 %x) {
define i32 @fold_zext_addition_or_disjoint(i8 %x) {
; CHECK-LABEL: @fold_zext_addition_or_disjoint(
-; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX:%.*]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[SE]], 1246
+; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[TMP1]], 1246
; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 12
@@ -4055,9 +4072,9 @@ define i32 @fold_zext_addition_or_disjoint(i8 %x) {
define i32 @fold_zext_addition_or_disjoint2(i8 %x) {
; CHECK-LABEL: @fold_zext_addition_or_disjoint2(
-; CHECK-NEXT: [[XX:%.*]] = add nuw i8 [[X:%.*]], 4
-; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
-; CHECK-NEXT: ret i32 [[SE]]
+; CHECK-NEXT: [[TMP1:%.*]] = add nuw i8 [[X:%.*]], 4
+; CHECK-NEXT: [[R:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 18
%se = zext i8 %xx to i32
>From d77f7e4bdcb7bdae48b963497ab502c162f08c74 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Sun, 5 May 2024 22:13:50 -0400
Subject: [PATCH 2/2] [InstCombine] Remove one-use requirement for add iN (sext
i1 X), (sext i1 Y) --> sext (X | Y) to iN
Since these remove instructions, we can forgo the one-use check, as long as at least ONE of the two sexts are one-use.
---
.../InstCombine/InstCombineSimplifyDemanded.cpp | 8 ++++----
llvm/test/Transforms/InstCombine/add.ll | 10 ++++------
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 6739b8745d74e4..cb543ed1da0c22 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -510,10 +510,10 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
}
// add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN
- // TODO: Relax the one-use checks because we are removing an instruction?
- if (match(I, m_Add(m_OneUse(m_SExt(m_Value(X))),
- m_OneUse(m_SExt(m_Value(Y))))) &&
- X->getType()->isIntOrIntVectorTy(1) && X->getType() == Y->getType()) {
+ if (match(I, m_Add(m_SExt(m_Value(X)), m_SExt(m_Value(Y)))) &&
+ X->getType()->isIntOrIntVectorTy(1) && X->getType() == Y->getType() &&
+ (I->getOperand(0)->hasOneUse() || I->getOperand(1)->hasOneUse())) {
+
// Truth table for inputs and output signbits:
// X:0 | X:1
// -----------
diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 66aaac3ab0c60c..42fdc4b98636aa 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -1437,11 +1437,10 @@ define i32 @and31_add_sexts(i1 %x, i1 %y) {
define i32 @lshr_add_use_sexts(i1 %x, i1 %y, ptr %p) {
; CHECK-LABEL: @lshr_add_use_sexts(
-; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32
; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32
; CHECK-NEXT: store i32 [[YS]], ptr [[P:%.*]], align 4
-; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]]
-; CHECK-NEXT: [[R:%.*]] = lshr i32 [[SUB]], 31
+; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[X:%.*]], [[Y]]
+; CHECK-NEXT: [[R:%.*]] = zext i1 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%xs = sext i1 %x to i32
@@ -1456,9 +1455,8 @@ define i32 @lshr_add_use_sexts_2(i1 %x, i1 %y, ptr %p) {
; CHECK-LABEL: @lshr_add_use_sexts_2(
; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32
; CHECK-NEXT: store i32 [[XS]], ptr [[P:%.*]], align 4
-; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32
-; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]]
-; CHECK-NEXT: [[R:%.*]] = lshr i32 [[SUB]], 31
+; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[X]], [[Y:%.*]]
+; CHECK-NEXT: [[R:%.*]] = zext i1 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
%xs = sext i1 %x to i32
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