[llvm] de9b386 - [X86] bypass-slow-division-64.ll - add optsize/minsize tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun May 5 05:27:48 PDT 2024
Author: Simon Pilgrim
Date: 2024-05-05T13:24:10+01:00
New Revision: de9b386f84b58ad0ffc12e221bc6d9161ca5b62d
URL: https://github.com/llvm/llvm-project/commit/de9b386f84b58ad0ffc12e221bc6d9161ca5b62d
DIFF: https://github.com/llvm/llvm-project/commit/de9b386f84b58ad0ffc12e221bc6d9161ca5b62d.diff
LOG: [X86] bypass-slow-division-64.ll - add optsize/minsize tests
Make sure we're not expanding div32-div64 codegen when we're focussed on codesize
Added:
Modified:
llvm/test/CodeGen/X86/bypass-slow-division-64.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/bypass-slow-division-64.ll b/llvm/test/CodeGen/X86/bypass-slow-division-64.ll
index cf8c3dd2af0b3a..2e0c47441f32f9 100644
--- a/llvm/test/CodeGen/X86/bypass-slow-division-64.ll
+++ b/llvm/test/CodeGen/X86/bypass-slow-division-64.ll
@@ -56,6 +56,28 @@ define i64 @Test_get_quotient(i64 %a, i64 %b) nounwind {
ret i64 %result
}
+define i64 @Test_get_quotient_optsize(i64 %a, i64 %b) nounwind optsize {
+; CHECK-LABEL: Test_get_quotient_optsize:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: cqto
+; CHECK-NEXT: idivq %rsi
+; CHECK-NEXT: retq
+ %result = sdiv i64 %a, %b
+ ret i64 %result
+}
+
+define i64 @Test_get_quotient_minsize(i64 %a, i64 %b) nounwind minsize {
+; CHECK-LABEL: Test_get_quotient_minsize:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: cqto
+; CHECK-NEXT: idivq %rsi
+; CHECK-NEXT: retq
+ %result = sdiv i64 %a, %b
+ ret i64 %result
+}
+
define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: Test_get_remainder:
; FAST-DIVQ: # %bb.0:
@@ -71,13 +93,13 @@ define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind {
; SLOW-DIVQ-NEXT: movq %rdi, %rcx
; SLOW-DIVQ-NEXT: orq %rsi, %rcx
; SLOW-DIVQ-NEXT: shrq $32, %rcx
-; SLOW-DIVQ-NEXT: je .LBB1_1
+; SLOW-DIVQ-NEXT: je .LBB3_1
; SLOW-DIVQ-NEXT: # %bb.2:
; SLOW-DIVQ-NEXT: cqto
; SLOW-DIVQ-NEXT: idivq %rsi
; SLOW-DIVQ-NEXT: movq %rdx, %rax
; SLOW-DIVQ-NEXT: retq
-; SLOW-DIVQ-NEXT: .LBB1_1:
+; SLOW-DIVQ-NEXT: .LBB3_1:
; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax killed $rax
; SLOW-DIVQ-NEXT: xorl %edx, %edx
; SLOW-DIVQ-NEXT: divl %esi
@@ -87,6 +109,30 @@ define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind {
ret i64 %result
}
+define i64 @Test_get_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
+; CHECK-LABEL: Test_get_remainder_optsize:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: cqto
+; CHECK-NEXT: idivq %rsi
+; CHECK-NEXT: movq %rdx, %rax
+; CHECK-NEXT: retq
+ %result = srem i64 %a, %b
+ ret i64 %result
+}
+
+define i64 @Test_get_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
+; CHECK-LABEL: Test_get_remainder_minsize:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: cqto
+; CHECK-NEXT: idivq %rsi
+; CHECK-NEXT: movq %rdx, %rax
+; CHECK-NEXT: retq
+ %result = srem i64 %a, %b
+ ret i64 %result
+}
+
define i64 @Test_get_quotient_and_remainder(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: Test_get_quotient_and_remainder:
; FAST-DIVQ: # %bb.0:
@@ -102,13 +148,13 @@ define i64 @Test_get_quotient_and_remainder(i64 %a, i64 %b) nounwind {
; SLOW-DIVQ-NEXT: movq %rdi, %rcx
; SLOW-DIVQ-NEXT: orq %rsi, %rcx
; SLOW-DIVQ-NEXT: shrq $32, %rcx
-; SLOW-DIVQ-NEXT: je .LBB2_1
+; SLOW-DIVQ-NEXT: je .LBB6_1
; SLOW-DIVQ-NEXT: # %bb.2:
; SLOW-DIVQ-NEXT: cqto
; SLOW-DIVQ-NEXT: idivq %rsi
; SLOW-DIVQ-NEXT: addq %rdx, %rax
; SLOW-DIVQ-NEXT: retq
-; SLOW-DIVQ-NEXT: .LBB2_1:
+; SLOW-DIVQ-NEXT: .LBB6_1:
; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax killed $rax
; SLOW-DIVQ-NEXT: xorl %edx, %edx
; SLOW-DIVQ-NEXT: divl %esi
@@ -122,6 +168,34 @@ define i64 @Test_get_quotient_and_remainder(i64 %a, i64 %b) nounwind {
ret i64 %result
}
+define i64 @Test_get_quotient_and_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
+; CHECK-LABEL: Test_get_quotient_and_remainder_optsize:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: cqto
+; CHECK-NEXT: idivq %rsi
+; CHECK-NEXT: addq %rdx, %rax
+; CHECK-NEXT: retq
+ %resultdiv = sdiv i64 %a, %b
+ %resultrem = srem i64 %a, %b
+ %result = add i64 %resultdiv, %resultrem
+ ret i64 %result
+}
+
+define i64 @Test_get_quotient_and_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
+; CHECK-LABEL: Test_get_quotient_and_remainder_minsize:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: cqto
+; CHECK-NEXT: idivq %rsi
+; CHECK-NEXT: addq %rdx, %rax
+; CHECK-NEXT: retq
+ %resultdiv = sdiv i64 %a, %b
+ %resultrem = srem i64 %a, %b
+ %result = add i64 %resultdiv, %resultrem
+ ret i64 %result
+}
+
define void @PR43514(i32 %x, i32 %y) {
; CHECK-LABEL: PR43514:
; CHECK: # %bb.0:
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