[llvm] [SelectionDAG] Make ARITH_FENCE support half and bfloat type (PR #90836)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Sat May 4 04:15:44 PDT 2024
================
@@ -157,6 +157,119 @@ define <8 x float> @f6(<8 x float> %a) {
ret <8 x float> %3
}
+define half @f7(half %a) nounwind {
+; X86-LABEL: f7:
+; X86: # %bb.0:
+; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: #ARITH_FENCE
+; X86-NEXT: retl
+;
+; X64-LABEL: f7:
+; X64: # %bb.0:
+; X64-NEXT: #ARITH_FENCE
+; X64-NEXT: retq
+ %b = call half @llvm.arithmetic.fence.f16(half %a)
+ ret half %b
+}
+
+define bfloat @f8(bfloat %a) nounwind {
+; X86-LABEL: f8:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: #ARITH_FENCE
+; X86-NEXT: pinsrw $0, %eax, %xmm0
+; X86-NEXT: retl
+;
+; X64-LABEL: f8:
+; X64: # %bb.0:
+; X64-NEXT: pextrw $0, %xmm0, %eax
+; X64-NEXT: #ARITH_FENCE
+; X64-NEXT: pinsrw $0, %eax, %xmm0
+; X64-NEXT: retq
+ %b = call bfloat @llvm.arithmetic.fence.bf16(bfloat %a)
+ ret bfloat %b
+}
+
+define <2 x half> @f9(<2 x half> %a) nounwind {
+; X86-LABEL: f9:
+; X86: # %bb.0:
+; X86-NEXT: movdqa %xmm0, %xmm1
+; X86-NEXT: psrld $16, %xmm1
+; X86-NEXT: #ARITH_FENCE
+; X86-NEXT: #ARITH_FENCE
+; X86-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
+; X86-NEXT: retl
+;
+; X64-LABEL: f9:
+; X64: # %bb.0:
+; X64-NEXT: movdqa %xmm0, %xmm1
+; X64-NEXT: psrld $16, %xmm1
+; X64-NEXT: #ARITH_FENCE
+; X64-NEXT: #ARITH_FENCE
+; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
+; X64-NEXT: retq
+ %b = call <2 x half> @llvm.arithmetic.fence.v2f16(<2 x half> %a)
+ ret <2 x half> %b
+}
+
----------------
phoebewang wrote:
Done.
https://github.com/llvm/llvm-project/pull/90836
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