[llvm] [InstCombine] Fold adds + shifts with nuw flags (PR #88193)
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llvm-commits at lists.llvm.org
Fri May 3 18:19:05 PDT 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/88193
>From d9542275ee686a15c5994c348597dac10ebe1942 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Thu, 2 May 2024 13:26:55 -0400
Subject: [PATCH 1/2] [InstCombine] Pre-commit tests (NFC)
---
llvm/test/Transforms/InstCombine/lshr.ll | 106 ++++++++++++++++++++++-
1 file changed, 102 insertions(+), 4 deletions(-)
diff --git a/llvm/test/Transforms/InstCombine/lshr.ll b/llvm/test/Transforms/InstCombine/lshr.ll
index 7d611ba188d6b4..c7b5e7256e63ec 100644
--- a/llvm/test/Transforms/InstCombine/lshr.ll
+++ b/llvm/test/Transforms/InstCombine/lshr.ll
@@ -163,6 +163,18 @@ define <2 x i8> @lshr_exact_splat_vec(<2 x i8> %x) {
ret <2 x i8> %lshr
}
+define <2 x i8> @lshr_exact_splat_vec_nuw(<2 x i8> %x) {
+; CHECK-LABEL: @lshr_exact_splat_vec_nuw(
+; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 1, i8 1>
+; CHECK-NEXT: [[LSHR:%.*]] = and <2 x i8> [[TMP1]], <i8 63, i8 63>
+; CHECK-NEXT: ret <2 x i8> [[LSHR]]
+;
+ %shl = shl nuw <2 x i8> %x, <i8 2, i8 2>
+ %add = add nuw <2 x i8> %shl, <i8 4, i8 4>
+ %lshr = lshr <2 x i8> %add, <i8 2, i8 2>
+ ret <2 x i8> %lshr
+}
+
define i8 @shl_add(i8 %x, i8 %y) {
; CHECK-LABEL: @shl_add(
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[Y:%.*]], 2
@@ -360,7 +372,69 @@ define <3 x i14> @mul_splat_fold_vec(<3 x i14> %x) {
ret <3 x i14> %t
}
-; Negative test
+define i32 @shl_add_lshr_flag_preservation(i32 %x, i32 %c, i32 %y) {
+; CHECK-LABEL: @shl_add_lshr_flag_preservation(
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[C:%.*]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[SHL]], [[Y:%.*]]
+; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[ADD]], [[C]]
+; CHECK-NEXT: ret i32 [[LSHR]]
+;
+ %shl = shl nuw i32 %x, %c
+ %add = add nuw nsw i32 %shl, %y
+ %lshr = lshr exact i32 %add, %c
+ ret i32 %lshr
+}
+
+define i32 @shl_add_lshr(i32 %x, i32 %c, i32 %y) {
+; CHECK-LABEL: @shl_add_lshr(
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[C:%.*]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[SHL]], [[Y:%.*]]
+; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[ADD]], [[C]]
+; CHECK-NEXT: ret i32 [[LSHR]]
+;
+ %mul = mul nuw i32 %0, 3
+ %lshr = lshr i32 %mul, 1
+ ret i32 %lshr
+}
+
+
+define i32 @shl_add_lshr_comm(i32 %x, i32 %c, i32 %y) {
+; CHECK-LABEL: @shl_add_lshr_comm(
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[C:%.*]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[SHL]], [[Y:%.*]]
+; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[ADD]], [[C]]
+; CHECK-NEXT: ret i32 [[LSHR]]
+;
+ %mul = mul nsw i32 %0, 3
+ %lshr = lshr i32 %mul, 1
+ ret i32 %lshr
+}
+
+; Negative tests
+
+define i32 @mul_times_3_div_2_no_flag(i32 %x) {
+; CHECK-LABEL: @mul_times_3_div_2_no_flag(
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], 3
+; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 1
+; CHECK-NEXT: ret i32 [[LSHR]]
+;
+ %mul = mul i32 %x, 3
+ %lshr = lshr i32 %mul, 1
+ ret i32 %lshr
+}
+
+define i32 @shl_add_lshr_neg(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @shl_add_lshr_neg(
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[SHL]], [[Z:%.*]]
+; CHECK-NEXT: [[RES:%.*]] = lshr exact i32 [[ADD]], [[Z]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %shl = shl nuw i32 %x, %y
+ %add = add nuw nsw i32 %shl, %z
+ %res = lshr exact i32 %add, %z
+ ret i32 %res
+}
define i32 @mul_splat_fold_wrong_mul_const(i32 %x) {
; CHECK-LABEL: @mul_splat_fold_wrong_mul_const(
@@ -373,7 +447,33 @@ define i32 @mul_splat_fold_wrong_mul_const(i32 %x) {
ret i32 %t
}
-; Negative test
+define i32 @shl_add_lshr_multiuse(i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @shl_add_lshr_multiuse(
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[SHL]], [[Z:%.*]]
+; CHECK-NEXT: call void @use(i32 [[ADD]])
+; CHECK-NEXT: [[RES:%.*]] = lshr exact i32 [[ADD]], [[Z]]
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %shl = shl nuw i32 %x, %y
+ %add = add nuw nsw i32 %shl, %z
+ call void @use (i32 %add)
+ %res = lshr exact i32 %add, %z
+ ret i32 %res
+}
+
+define i32 @mul_times_3_div_2_multiuse(i32 %x) {
+; CHECK-LABEL: @mul_times_3_div_2_multiuse(
+; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 3
+; CHECK-NEXT: [[RES:%.*]] = lshr i32 [[MUL]], 1
+; CHECK-NEXT: call void @use(i32 [[MUL]])
+; CHECK-NEXT: ret i32 [[RES]]
+;
+ %mul = mul nuw i32 %x, 3
+ %res = lshr i32 %mul, 1
+ call void @use (i32 %mul)
+ ret i32 %res
+}
define i32 @mul_splat_fold_wrong_lshr_const(i32 %x) {
; CHECK-LABEL: @mul_splat_fold_wrong_lshr_const(
@@ -386,8 +486,6 @@ define i32 @mul_splat_fold_wrong_lshr_const(i32 %x) {
ret i32 %t
}
-; Negative test
-
define i32 @mul_splat_fold_no_nuw(i32 %x) {
; CHECK-LABEL: @mul_splat_fold_no_nuw(
; CHECK-NEXT: [[M:%.*]] = mul nsw i32 [[X:%.*]], 65537
>From 0ebbc1fd11f796e7d5685ccb01b9830faa54a426 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Sun, 21 Apr 2024 17:50:52 -0400
Subject: [PATCH 2/2] [InstCombine] Fold adds + shifts with nuw flags
Proofs:
https://alive2.llvm.org/ce/z/kDVTiL
https://alive2.llvm.org/ce/z/wORNYm
---
.../InstCombine/InstCombineShifts.cpp | 14 ++++-
llvm/test/Transforms/InstCombine/lshr.ll | 59 ++++++-------------
2 files changed, 30 insertions(+), 43 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 1cb21a1d81af4b..28c456140961e7 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -1259,6 +1259,18 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
match(Op1, m_SpecificIntAllowPoison(BitWidth - 1)))
return new ZExtInst(Builder.CreateIsNotNeg(X, "isnotneg"), Ty);
+ // If both the add and the shift are nuw, then:
+ // ((X << nuw Z) + nuw Y) >>u Z --> X + nuw (Y >>u Z)
+ Value *Y;
+ if (match(Op0, m_OneUse(m_c_NUWAdd(m_NUWShl(m_Value(X), m_Specific(Op1)),
+ m_Value(Y))))) {
+ Value *NewLshr = Builder.CreateLShr(Y, Op1, "", I.isExact());
+ auto *NewAdd = BinaryOperator::CreateNUWAdd(NewLshr, X);
+ NewAdd->setHasNoSignedWrap(
+ cast<OverflowingBinaryOperator>(Op0)->hasNoSignedWrap());
+ return NewAdd;
+ }
+
if (match(Op1, m_APInt(C))) {
unsigned ShAmtC = C->getZExtValue();
auto *II = dyn_cast<IntrinsicInst>(Op0);
@@ -1275,7 +1287,6 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
return new ZExtInst(Cmp, Ty);
}
- Value *X;
const APInt *C1;
if (match(Op0, m_Shl(m_Value(X), m_APInt(C1))) && C1->ult(BitWidth)) {
if (C1->ult(ShAmtC)) {
@@ -1320,7 +1331,6 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
// ((X << C) + Y) >>u C --> (X + (Y >>u C)) & (-1 >>u C)
// TODO: Consolidate with the more general transform that starts from shl
// (the shifts are in the opposite order).
- Value *Y;
if (match(Op0,
m_OneUse(m_c_Add(m_OneUse(m_Shl(m_Value(X), m_Specific(Op1))),
m_Value(Y))))) {
diff --git a/llvm/test/Transforms/InstCombine/lshr.ll b/llvm/test/Transforms/InstCombine/lshr.ll
index c7b5e7256e63ec..18dcc7005521b2 100644
--- a/llvm/test/Transforms/InstCombine/lshr.ll
+++ b/llvm/test/Transforms/InstCombine/lshr.ll
@@ -165,8 +165,7 @@ define <2 x i8> @lshr_exact_splat_vec(<2 x i8> %x) {
define <2 x i8> @lshr_exact_splat_vec_nuw(<2 x i8> %x) {
; CHECK-LABEL: @lshr_exact_splat_vec_nuw(
-; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 1, i8 1>
-; CHECK-NEXT: [[LSHR:%.*]] = and <2 x i8> [[TMP1]], <i8 63, i8 63>
+; CHECK-NEXT: [[LSHR:%.*]] = add nuw <2 x i8> [[X:%.*]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i8> [[LSHR]]
;
%shl = shl nuw <2 x i8> %x, <i8 2, i8 2>
@@ -374,9 +373,8 @@ define <3 x i14> @mul_splat_fold_vec(<3 x i14> %x) {
define i32 @shl_add_lshr_flag_preservation(i32 %x, i32 %c, i32 %y) {
; CHECK-LABEL: @shl_add_lshr_flag_preservation(
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[SHL]], [[Y:%.*]]
-; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i32 [[ADD]], [[C]]
+; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[Y:%.*]], [[C:%.*]]
+; CHECK-NEXT: [[LSHR:%.*]] = add nuw nsw i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[LSHR]]
;
%shl = shl nuw i32 %x, %c
@@ -387,41 +385,29 @@ define i32 @shl_add_lshr_flag_preservation(i32 %x, i32 %c, i32 %y) {
define i32 @shl_add_lshr(i32 %x, i32 %c, i32 %y) {
; CHECK-LABEL: @shl_add_lshr(
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[SHL]], [[Y:%.*]]
-; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[ADD]], [[C]]
+; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[Y:%.*]], [[C:%.*]]
+; CHECK-NEXT: [[LSHR:%.*]] = add nuw i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[LSHR]]
;
- %mul = mul nuw i32 %0, 3
- %lshr = lshr i32 %mul, 1
+ %shl = shl nuw i32 %x, %c
+ %add = add nuw i32 %shl, %y
+ %lshr = lshr i32 %add, %c
ret i32 %lshr
}
-
define i32 @shl_add_lshr_comm(i32 %x, i32 %c, i32 %y) {
; CHECK-LABEL: @shl_add_lshr_comm(
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[SHL]], [[Y:%.*]]
-; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[ADD]], [[C]]
+; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[Y:%.*]], [[C:%.*]]
+; CHECK-NEXT: [[LSHR:%.*]] = add nuw i32 [[TMP1]], [[X:%.*]]
; CHECK-NEXT: ret i32 [[LSHR]]
;
- %mul = mul nsw i32 %0, 3
- %lshr = lshr i32 %mul, 1
+ %shl = shl nuw i32 %x, %c
+ %add = add nuw i32 %y, %shl
+ %lshr = lshr i32 %add, %c
ret i32 %lshr
}
-; Negative tests
-
-define i32 @mul_times_3_div_2_no_flag(i32 %x) {
-; CHECK-LABEL: @mul_times_3_div_2_no_flag(
-; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], 3
-; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[MUL]], 1
-; CHECK-NEXT: ret i32 [[LSHR]]
-;
- %mul = mul i32 %x, 3
- %lshr = lshr i32 %mul, 1
- ret i32 %lshr
-}
+; Negative test
define i32 @shl_add_lshr_neg(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @shl_add_lshr_neg(
@@ -447,6 +433,8 @@ define i32 @mul_splat_fold_wrong_mul_const(i32 %x) {
ret i32 %t
}
+; Negative test
+
define i32 @shl_add_lshr_multiuse(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @shl_add_lshr_multiuse(
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[Y:%.*]]
@@ -462,19 +450,6 @@ define i32 @shl_add_lshr_multiuse(i32 %x, i32 %y, i32 %z) {
ret i32 %res
}
-define i32 @mul_times_3_div_2_multiuse(i32 %x) {
-; CHECK-LABEL: @mul_times_3_div_2_multiuse(
-; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 3
-; CHECK-NEXT: [[RES:%.*]] = lshr i32 [[MUL]], 1
-; CHECK-NEXT: call void @use(i32 [[MUL]])
-; CHECK-NEXT: ret i32 [[RES]]
-;
- %mul = mul nuw i32 %x, 3
- %res = lshr i32 %mul, 1
- call void @use (i32 %mul)
- ret i32 %res
-}
-
define i32 @mul_splat_fold_wrong_lshr_const(i32 %x) {
; CHECK-LABEL: @mul_splat_fold_wrong_lshr_const(
; CHECK-NEXT: [[M:%.*]] = mul nuw i32 [[X:%.*]], 65537
@@ -486,6 +461,8 @@ define i32 @mul_splat_fold_wrong_lshr_const(i32 %x) {
ret i32 %t
}
+; Negative test
+
define i32 @mul_splat_fold_no_nuw(i32 %x) {
; CHECK-LABEL: @mul_splat_fold_no_nuw(
; CHECK-NEXT: [[M:%.*]] = mul nsw i32 [[X:%.*]], 65537
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