[llvm] 0c7e706 - [AArch64] Pre-commit another test case for #90936. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2024-05-03T16:29:47-07:00
New Revision: 0c7e706c08fe4d13b5b8105dc62515a39b14ff5c

URL: https://github.com/llvm/llvm-project/commit/0c7e706c08fe4d13b5b8105dc62515a39b14ff5c
DIFF: https://github.com/llvm/llvm-project/commit/0c7e706c08fe4d13b5b8105dc62515a39b14ff5c.diff

LOG: [AArch64] Pre-commit another test case for #90936. NFC

Another similar problem was added to the ticket after the first fix.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/pr90936.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/pr90936.ll b/llvm/test/CodeGen/AArch64/pr90936.ll
index 38cda8d388945f..cd816cdbf73512 100644
--- a/llvm/test/CodeGen/AArch64/pr90936.ll
+++ b/llvm/test/CodeGen/AArch64/pr90936.ll
@@ -18,3 +18,28 @@ bb:
   store i8 %i5, ptr %i4, align 1
   ret void
 }
+
+define void @g(i32 %arg, ptr %arg1) {
+; CHECK-LABEL: g:
+; CHECK:       // %bb.0: // %bb
+; CHECK-NEXT:    and w8, w0, #0xff
+; CHECK-NEXT:    str w8, [x1]
+; CHECK-NEXT:    ret
+bb:
+  %i = trunc i32 %arg to i8
+  store i8 %i, ptr %arg1, align 1
+  %i2 = lshr i32 %arg, 8
+  %i3 = trunc i32 %i2 to i8
+  %i4 = getelementptr i8, ptr %arg1, i64 1
+  store i8 %i3, ptr %i4, align 1
+  %i5 = lshr i32 %arg, 16
+  %i6 = trunc i32 %i5 to i8
+  %i7 = getelementptr i8, ptr %arg1, i64 2
+  store i8 %i6, ptr %i7, align 1
+  %i8 = zext i8 %i to i32
+  %i9 = lshr i32 %i8, 24
+  %i10 = getelementptr i8, ptr %arg1, i64 3
+  %i11 = trunc i32 %i9 to i8
+  store i8 %i11, ptr %i10, align 1
+  ret void
+}