[llvm] [RISCV][TTI] Improve SiFive7 reduction cost (PR #90951)

[Kolya Panchenko via llvm-commits]

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@@ -43,11 +91,23 @@ RISCVTTIImpl::getRISCVInstructionCost(ArrayRef<unsigned> OpCodes, MVT VT,
   size_t NumInstr = OpCodes.size();
   if (CostKind == TTI::TCK_CodeSize)
     return NumInstr;
+
+  std::optional<InstructionCost> (*GetTargetCost)(
+      unsigned, MVT, TTI::TargetCostKind) = nullptr;
+  if (ST->getProcFamily() == RISCVSubtarget::SiFive7)
+    GetTargetCost = getSiFiveX280RVVCost;
   InstructionCost LMULCost = TLI->getLMULCost(VT);
   if ((CostKind != TTI::TCK_RecipThroughput) && (CostKind != TTI::TCK_Latency))
     return LMULCost * NumInstr;
   InstructionCost Cost = 0;
   for (auto Op : OpCodes) {
+    std::optional<InstructionCost> OverrideCost =
+        GetTargetCost ? GetTargetCost(Op, VT, CostKind) : std::nullopt;
+    if (OverrideCost) {
+      Cost += *OverrideCost;
+      continue;
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nikolaypanchenko wrote:

Cannot find what's a recommended way in upstream for specific cpus, but it makes more sense to either move `for (auto Op: OCodes` into `getSiFiveX280RVVCost` or call `getSiFiveX280RVVCost` under each specific case.

https://github.com/llvm/llvm-project/pull/90951