[llvm] SystemZ: Fold copy of vector immediate to gr128 (PR #90706)

[Ulrich Weigand via llvm-commits]

================
@@ -0,0 +1,182 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -run-pass=peephole-opt -o - %s | FileCheck %s
+
+---
+name:            fold_vgbm_0_copyvr128_to_gr128_virtreg
+tracksRegLiveness: true
+body:             |
+  bb.0:
+      liveins: $r2d
+    ; CHECK-LABEL: name: fold_vgbm_0_copyvr128_to_gr128_virtreg
+    ; CHECK: liveins: $r2d
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64bit = COPY $r2d
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:addr64bit = COPY [[COPY]]
+    ; CHECK-NEXT: [[VGBM:%[0-9]+]]:vr128bit = VGBM 0
+    ; CHECK-NEXT: [[LGHI:%[0-9]+]]:gr64bit = LGHI 0
+    ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:gr128bit = REG_SEQUENCE [[LGHI]], %subreg.subreg_h64, [[LGHI]], %subreg.subreg_l64
+    ; CHECK-NEXT: $r0q = COPY [[REG_SEQUENCE]]
+    ; CHECK-NEXT: Return implicit $r0q
+    %0:gr64bit = COPY $r2d
+    %1:addr64bit = COPY %0
+    %2:vr128bit = VGBM 0
+    %3:gr128bit = COPY %2
+    $r0q = COPY %3
+    Return implicit $r0q
+...
+
+---
+name:            fold_vgbm_0_copyvr128_to_gr128_virtreg_multi_use
+tracksRegLiveness: true
+body:             |
+  bb.0:
+      liveins: $r2d
+    ; CHECK-LABEL: name: fold_vgbm_0_copyvr128_to_gr128_virtreg_multi_use
+    ; CHECK: liveins: $r2d
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64bit = COPY $r2d
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:addr64bit = COPY [[COPY]]
+    ; CHECK-NEXT: [[VGBM:%[0-9]+]]:vr128bit = VGBM 0
+    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr128bit = COPY [[VGBM]]
+    ; CHECK-NEXT: $r0q = COPY [[COPY2]]
+    ; CHECK-NEXT: $r2q = COPY [[COPY2]]
+    ; CHECK-NEXT: Return implicit $r0q, implicit $r2q
+    %0:gr64bit = COPY $r2d
+    %1:addr64bit = COPY %0
+    %2:vr128bit = VGBM 0
+    %3:gr128bit = COPY %2
+    %4:gr128bit = COPY %2
+    $r0q = COPY %3
+    $r2q = COPY %4
+    Return implicit $r0q, implicit $r2q
+...
+
+---
+name:            fold_vgbm_0_copyvr128_to_gr128_physreg
+tracksRegLiveness: true
+body:             |
+  bb.0:
+      liveins: $r2d
+    ; CHECK-LABEL: name: fold_vgbm_0_copyvr128_to_gr128_physreg
+    ; CHECK: liveins: $r2d
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64bit = COPY $r2d
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:addr64bit = COPY [[COPY]]
+    ; CHECK-NEXT: [[VGBM:%[0-9]+]]:vr128bit = VGBM 0
+    ; CHECK-NEXT: $r0q = COPY [[VGBM]]
+    ; CHECK-NEXT: Return implicit $r0q
+    %0:gr64bit = COPY $r2d
+    %1:addr64bit = COPY %0
+    %2:vr128bit = VGBM 0
+    $r0q = COPY %2
+    Return implicit $r0q
+...
+
+---
+name:            no_fold_vgbm_0_copyvr128_to_vr128_virtreg
+tracksRegLiveness: true
+body:             |
+  bb.0:
+      liveins: $r2d
+    ; CHECK-LABEL: name: no_fold_vgbm_0_copyvr128_to_vr128_virtreg
+    ; CHECK: liveins: $r2d
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64bit = COPY $r2d
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:addr64bit = COPY [[COPY]]
+    ; CHECK-NEXT: [[VGBM:%[0-9]+]]:vr128bit = VGBM 0
+    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vr128bit = COPY [[VGBM]]
+    ; CHECK-NEXT: $v0 = COPY [[COPY2]]
+    ; CHECK-NEXT: Return implicit $v0
+    %0:gr64bit = COPY $r2d
+    %1:addr64bit = COPY %0
+    %2:vr128bit = VGBM 0
+    %3:vr128bit = COPY %2
+    $v0 = COPY %3
+    Return implicit $v0
+...
+
+---
+name:            no_fold_vgbm_0_copyvr128_to_vr128_physreg
+tracksRegLiveness: true
+body:             |
+  bb.0:
+      liveins: $r2d
+    ; CHECK-LABEL: name: no_fold_vgbm_0_copyvr128_to_vr128_physreg
+    ; CHECK: liveins: $r2d
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64bit = COPY $r2d
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:addr64bit = COPY [[COPY]]
+    ; CHECK-NEXT: [[VGBM:%[0-9]+]]:vr128bit = VGBM 0
+    ; CHECK-NEXT: $v0 = COPY [[VGBM]]
+    ; CHECK-NEXT: Return implicit $v0
+    %0:gr64bit = COPY $r2d
+    %1:addr64bit = COPY %0
+    %2:vr128bit = VGBM 0
+    $v0 = COPY %2
+    Return implicit $v0
+...
+
+---
+name:            fold_vgbm_1_copyvr128_to_gr128_virtreg
+tracksRegLiveness: true
+body:             |
+  bb.0:
+      liveins: $r2d
+    ; CHECK-LABEL: name: fold_vgbm_1_copyvr128_to_gr128_virtreg
+    ; CHECK: liveins: $r2d
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64bit = COPY $r2d
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:addr64bit = COPY [[COPY]]
+    ; CHECK-NEXT: [[VGBM:%[0-9]+]]:vr128bit = VGBM 1
+    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr128bit = COPY [[VGBM]]
+    ; CHECK-NEXT: $r0q = COPY [[COPY2]]
+    ; CHECK-NEXT: Return implicit $r0q
+    %0:gr64bit = COPY $r2d
+    %1:addr64bit = COPY %0
+    %2:vr128bit = VGBM 1
----------------
uweigand wrote:

I assume this should be VGBM 0 here as well?

https://github.com/llvm/llvm-project/pull/90706