[llvm] [RISCV] Support interleaved accesses for scalable vector. (PR #90583)

[Mel Chen via llvm-commits]

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@@ -1,54 +1,113 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes=loop-vectorize -mtriple=riscv64 -mattr=+v -S | FileCheck %s
+; RUN: opt < %s -passes=loop-vectorize -scalable-vectorization=off -mtriple=riscv64 -mattr=+v -S | FileCheck %s --check-prefix=FIXED
+; RUN: opt < %s -passes=loop-vectorize -scalable-vectorization=on -mtriple=riscv64 -mattr=+v -S | FileCheck %s --check-prefix=SCALABLE
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Mel-Chen wrote:

7ced0be4668b2dd6412db306622dbb5fb57b5fae
Sure.

https://github.com/llvm/llvm-project/pull/90583