[llvm] [DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. (PR #90939)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=aarch64 | FileCheck %s
+
+define void @f(i16 %0, ptr %1) {
+; CHECK-LABEL: f:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    ubfx w8, w0, #8, #6
+; CHECK-NEXT:    strb w0, [x1]
+; CHECK-NEXT:    strb w8, [x1, #1]
+; CHECK-NEXT:    ret
+  %3 = trunc i16 %0 to i8
+  %4 = trunc i16 %0 to i14
+  %new0 = lshr i14 %4, 8
+ store i8 %3, ptr %1, align 1
+  %5 = getelementptr i8, ptr %1, i64 1
+ %6 = trunc i14 %new0 to i8
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arsenm wrote:

Indentation weird and use named values 

https://github.com/llvm/llvm-project/pull/90939