[llvm] SystemZ: Stop casting fp typed atomic loads in the IR (PR #90768)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu May 2 07:35:04 PDT 2024
================
@@ -6249,6 +6249,41 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
}
}
+// Manually lower a bitcast to avoid introducing illegal types after type
+// legalization.
+static SDValue expandBitCastI128ToF128(SelectionDAG &DAG, SDValue Src,
+ SDValue Chain, const SDLoc &SL) {
+ MachineFunction &MF = DAG.getMachineFunction();
+ const DataLayout &DL = DAG.getDataLayout();
+
+ assert(DL.isBigEndian());
+
+ Align F128Align = DL.getPrefTypeAlign(Type::getFP128Ty(*DAG.getContext()));
+ SDValue StackTemp = DAG.CreateStackTemporary(MVT::f128, F128Align.value());
+ int FI = cast<FrameIndexSDNode>(StackTemp)->getIndex();
+ Align A = MF.getFrameInfo().getObjectAlign(FI);
+
+ SDValue Hi =
+ DAG.getTargetExtractSubreg(SystemZ::subreg_h64, SL, MVT::i64, Src);
+ SDValue Lo =
+ DAG.getTargetExtractSubreg(SystemZ::subreg_l64, SL, MVT::i64, Src);
+
----------------
arsenm wrote:
If I do that I ultimately get this from copyPhysReg:
$f0q = $r0q
Impossible reg-to-reg copy
https://github.com/llvm/llvm-project/pull/90768
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