[llvm] 7925525 - SystemZ: Add missing predicate for bitconvert patterns (#90715)

via llvm-commits llvm-commits at lists.llvm.org
Thu May 2 06:22:04 PDT 2024


Author: Matt Arsenault
Date: 2024-05-02T15:22:00+02:00
New Revision: 7925525d330a46480b0c3b136e5f47948c5cb741

URL: https://github.com/llvm/llvm-project/commit/7925525d330a46480b0c3b136e5f47948c5cb741
DIFF: https://github.com/llvm/llvm-project/commit/7925525d330a46480b0c3b136e5f47948c5cb741.diff

LOG: SystemZ: Add missing predicate for bitconvert patterns (#90715)

Added: 
    

Modified: 
    llvm/lib/Target/SystemZ/SystemZInstrVector.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/SystemZ/SystemZInstrVector.td b/llvm/lib/Target/SystemZ/SystemZInstrVector.td
index c29c54a6cb79de..c09f48891c1391 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrVector.td
+++ b/llvm/lib/Target/SystemZ/SystemZInstrVector.td
@@ -1692,6 +1692,7 @@ let Predicates = [FeatureVector] in
 // Conversions
 //===----------------------------------------------------------------------===//
 
+let Predicates = [FeatureVector] in {
 def : Pat<(v16i8 (bitconvert (v8i16 VR128:$src))), (v16i8 VR128:$src)>;
 def : Pat<(v16i8 (bitconvert (v4i32 VR128:$src))), (v16i8 VR128:$src)>;
 def : Pat<(v16i8 (bitconvert (v2i64 VR128:$src))), (v16i8 VR128:$src)>;
@@ -1755,6 +1756,7 @@ def : Pat<(i128  (bitconvert (v2i64 VR128:$src))), (i128  VR128:$src)>;
 def : Pat<(i128  (bitconvert (v4f32 VR128:$src))), (i128  VR128:$src)>;
 def : Pat<(i128  (bitconvert (v2f64 VR128:$src))), (i128  VR128:$src)>;
 def : Pat<(i128  (bitconvert (f128  VR128:$src))), (i128  VR128:$src)>;
+} // End Predicates = [FeatureVector]
 
 //===----------------------------------------------------------------------===//
 // Replicating scalars


        


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