[llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)

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git-clang-format --diff df91cde4da62aec22e4d384b1bc800590c7f561a d83e5170cb5555f5c93a81d31dcf58c9911c4fe3 -- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp llvm/lib/Target/RISCV/RISCVFrameLowering.h llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.h llvm/lib/Target/RISCV/RISCVSubtarget.cpp llvm/lib/Target/RISCV/RISCVSubtarget.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index b725bfb563..437a935c12 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1027,7 +1027,7 @@ RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
 }
 
 void RISCVFrameLowering::determineMustCalleeSaves(MachineFunction &MF,
-                                              BitVector &SavedRegs) const {
+                                                  BitVector &SavedRegs) const {
   const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
 
   // Resize before the early returns. Some backends expect that
@@ -1061,9 +1061,9 @@ void RISCVFrameLowering::determineMustCalleeSaves(MachineFunction &MF,
   // execution we do not need the CSR spills either: setjmp stores all CSRs
   // it was called with into the jmp_buf, which longjmp then restores.
   if (MF.getFunction().hasFnAttribute(Attribute::NoReturn) &&
-        MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
-        !MF.getFunction().hasFnAttribute(Attribute::UWTable) &&
-        enableCalleeSaveSkip(MF))
+      MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
+      !MF.getFunction().hasFnAttribute(Attribute::UWTable) &&
+      enableCalleeSaveSkip(MF))
     return;
 
   // Functions which call __builtin_unwind_init get all their registers saved.
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.h b/llvm/lib/Target/RISCV/RISCVFrameLowering.h
index d7b9df8bd6..f6977d8092 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.h
@@ -31,7 +31,8 @@ public:
   StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
                                      Register &FrameReg) const override;
 
-  void determineMustCalleeSaves(MachineFunction &MF, BitVector &SavedRegs) const;
+  void determineMustCalleeSaves(MachineFunction &MF,
+                                BitVector &SavedRegs) const;
   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
                             RegScavenger *RS) const override;
 
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 7978dac4aa..c63e2d3753 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -21316,7 +21316,7 @@ unsigned RISCVTargetLowering::getCustomCtpopCost(EVT VT,
 
 void RISCVTargetLowering::finalizeLowering(MachineFunction &MF) const {
   const Function &F = MF.getFunction();
-  if (!Subtarget.doCSRSavesInRA() || !F.doesNotThrow()) { 
+  if (!Subtarget.doCSRSavesInRA() || !F.doesNotThrow()) {
     TargetLoweringBase::finalizeLowering(MF);
     return;
   }
@@ -21336,7 +21336,7 @@ void RISCVTargetLowering::finalizeLowering(MachineFunction &MF) const {
 
   BitVector MustCalleeSavedRegs;
   TFI.determineMustCalleeSaves(MF, MustCalleeSavedRegs);
-  const MCPhysReg * CSRegs = MF.getRegInfo().getCalleeSavedRegs();
+  const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs();
   SmallVector<MCPhysReg, 4> EligibleRegs;
   for (int i = 0; CSRegs[i]; ++i) {
     if (!MustCalleeSavedRegs[i])
@@ -21349,16 +21349,13 @@ void RISCVTargetLowering::finalizeLowering(MachineFunction &MF) const {
     for (MCPhysReg Reg : EligibleRegs) {
       SaveMBB->addLiveIn(Reg);
       // TODO: should we use Maximal register class instead?
-      Register VReg = MRI.createVirtualRegister(TRI.getMinimalPhysRegClass(Reg));
+      Register VReg =
+          MRI.createVirtualRegister(TRI.getMinimalPhysRegClass(Reg));
       VRegs.push_back(VReg);
-      BuildMI(
-        *SaveMBB,
-        SaveMBB->begin(),
-        SaveMBB->findDebugLoc(SaveMBB->begin()),
-        TII.get(TargetOpcode::COPY),
-        VReg
-      )
-      .addReg(Reg);
+      BuildMI(*SaveMBB, SaveMBB->begin(),
+              SaveMBB->findDebugLoc(SaveMBB->begin()),
+              TII.get(TargetOpcode::COPY), VReg)
+          .addReg(Reg);
     }
   }
 
@@ -21368,22 +21365,12 @@ void RISCVTargetLowering::finalizeLowering(MachineFunction &MF) const {
     auto VRegI = VRegs.begin();
     for (MCPhysReg Reg : EligibleRegs) {
       Register VReg = *VRegI;
-      BuildMI(
-        *RestoreMBB,
-        ReturnMI.getIterator(),
-        ReturnMI.getDebugLoc(),
-        TII.get(TargetOpcode::COPY),
-        Reg
-      )
-      .addReg(VReg);
-      ReturnMI.addOperand(
-        MF,
-        MachineOperand::CreateReg(
-          Reg,
-          /*isDef=*/false,
-          /*isImplicit=*/true
-        )
-      );
+      BuildMI(*RestoreMBB, ReturnMI.getIterator(), ReturnMI.getDebugLoc(),
+              TII.get(TargetOpcode::COPY), Reg)
+          .addReg(VReg);
+      ReturnMI.addOperand(MF, MachineOperand::CreateReg(Reg,
+                                                        /*isDef=*/false,
+                                                        /*isImplicit=*/true));
       VRegI++;
     }
   }
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
index 15476fc2d3..88dab938ab 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
@@ -67,8 +67,8 @@ static cl::opt<unsigned> RISCVMinimumJumpTableEntries(
 
 static cl::opt<bool> RISCVEnableSaveCSRByRA(
     "riscv-enable-save-csr-in-ra",
-    cl::desc("Let register alloctor do csr saves/restores"),
-    cl::init(false), cl::Hidden);
+    cl::desc("Let register alloctor do csr saves/restores"), cl::init(false),
+    cl::Hidden);
 
 void RISCVSubtarget::anchor() {}
 
@@ -135,9 +135,7 @@ bool RISCVSubtarget::useConstantPoolForLargeInts() const {
   return !RISCVDisableUsingConstantPoolForLargeInts;
 }
 
-bool RISCVSubtarget::doCSRSavesInRA() const {
-  return RISCVEnableSaveCSRByRA;
-}
+bool RISCVSubtarget::doCSRSavesInRA() const { return RISCVEnableSaveCSRByRA; }
 
 unsigned RISCVSubtarget::getMaxBuildIntsCost() const {
   // Loading integer from constant pool needs two instructions (the reason why

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https://github.com/llvm/llvm-project/pull/90819