[llvm] [AMDGPU] fix the check of inst-order in a test (PR #90744)

[Gang Chen via llvm-commits]

https://github.com/cmc-rep created https://github.com/llvm/llvm-project/pull/90744

test was not well written to consider potential all-correct instruction ordering

>From ea1d17f9b4279cc8244e6b2b9b63c5c4c0851523 Mon Sep 17 00:00:00 2001
From: gangc <gangc at amd.com>
Date: Tue, 30 Apr 2024 10:54:13 -0700
Subject: [PATCH] [AMDGPU] fix test: unnecessary instruction order check

Signed-off-by: gangc <gangc at amd.com>
---
 .../AMDGPU/preserve-wwm-copy-dst-reg.ll       | 36 +++++++++----------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll b/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
index 1be041c8dc9b0b..160f5785dbb0dd 100644
--- a/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
+++ b/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
@@ -31,15 +31,15 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 {
 ; GFX906-NEXT:    s_mov_b32 s24, s12
 ; GFX906-NEXT:    v_writelane_b32 v2, s24, 5
 ; GFX906-NEXT:    s_mov_b64 s[26:27], s[10:11]
-; GFX906-NEXT:    v_writelane_b32 v2, s26, 6
-; GFX906-NEXT:    v_writelane_b32 v41, s34, 2
-; GFX906-NEXT:    v_writelane_b32 v2, s27, 7
-; GFX906-NEXT:    v_writelane_b32 v41, s35, 3
-; GFX906-NEXT:    v_writelane_b32 v2, s8, 8
-; GFX906-NEXT:    v_writelane_b32 v41, s16, 4
-; GFX906-NEXT:    v_writelane_b32 v2, s9, 9
-; GFX906-NEXT:    v_writelane_b32 v41, s30, 0
-; GFX906-NEXT:    v_writelane_b32 v2, s4, 10
+; GFX906-DAG:     v_writelane_b32 v2, s26, 6
+; GFX906-DAG:     v_writelane_b32 v41, s34, 2
+; GFX906-DAG:     v_writelane_b32 v2, s27, 7
+; GFX906-DAG:     v_writelane_b32 v41, s35, 3
+; GFX906-DAG:     v_writelane_b32 v2, s8, 8
+; GFX906-DAG:     v_writelane_b32 v41, s16, 4
+; GFX906-DAG:     v_writelane_b32 v2, s9, 9
+; GFX906-DAG:     v_writelane_b32 v41, s30, 0
+; GFX906-DAG:     v_writelane_b32 v2, s4, 10
 ; GFX906-NEXT:    s_addk_i32 s32, 0x2800
 ; GFX906-NEXT:    v_writelane_b32 v41, s31, 1
 ; GFX906-NEXT:    v_mov_b32_e32 v32, v31
@@ -340,9 +340,9 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 {
 ; GFX906-NEXT:    v_readlane_b32 s31, v41, 1
 ; GFX906-NEXT:    v_readlane_b32 s30, v41, 0
 ; GFX906-NEXT:    ; kill: killed $vgpr40
-; GFX906-NEXT:    v_readlane_b32 s34, v41, 2
-; GFX906-NEXT:    v_readlane_b32 s35, v41, 3
-; GFX906-NEXT:    v_readlane_b32 s4, v41, 4
+; GFX906-DAG:     v_readlane_b32 s34, v41, 2
+; GFX906-DAG:     v_readlane_b32 s35, v41, 3
+; GFX906-DAG:     v_readlane_b32 s4, v41, 4
 ; GFX906-NEXT:    s_waitcnt vmcnt(0)
 ; GFX906-NEXT:    flat_store_dwordx4 v[0:1], v[30:33] offset:112
 ; GFX906-NEXT:    s_waitcnt vmcnt(0)
@@ -383,12 +383,12 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 {
 ; GFX908-NEXT:    s_mov_b64 exec, -1
 ; GFX908-NEXT:    buffer_store_dword v40, off, s[0:3], s33 offset:152 ; 4-byte Folded Spill
 ; GFX908-NEXT:    s_mov_b64 exec, s[18:19]
-; GFX908-NEXT:    v_mov_b32_e32 v3, s34
-; GFX908-NEXT:    buffer_store_dword v3, off, s[0:3], s33 offset:160 ; 4-byte Folded Spill
-; GFX908-NEXT:    v_mov_b32_e32 v3, s35
-; GFX908-NEXT:    buffer_store_dword v3, off, s[0:3], s33 offset:164 ; 4-byte Folded Spill
-; GFX908-NEXT:    v_mov_b32_e32 v3, s16
-; GFX908-NEXT:    buffer_store_dword v3, off, s[0:3], s33 offset:168 ; 4-byte Folded Spill
+; GFX908-DAG:     v_mov_b32_e32 v3, s34
+; GFX908-DAG:     buffer_store_dword v3, off, s[0:3], s33 offset:160 ; 4-byte Folded Spill
+; GFX908-DAG:     v_mov_b32_e32 v3, s35
+; GFX908-DAG:     buffer_store_dword v3, off, s[0:3], s33 offset:164 ; 4-byte Folded Spill
+; GFX908-DAG:     v_mov_b32_e32 v3, s16
+; GFX908-DAG:     buffer_store_dword v3, off, s[0:3], s33 offset:168 ; 4-byte Folded Spill
 ; GFX908-NEXT:    s_addk_i32 s32, 0x2c00
 ; GFX908-NEXT:    s_mov_b64 s[16:17], exec
 ; GFX908-NEXT:    s_mov_b64 exec, 1