[llvm] [Hexagon] Fix hexagon-copy-hoisting.mir (PR #90740)

[Perry MacMurray via llvm-commits]

https://github.com/quic-pmacmurr created https://github.com/llvm/llvm-project/pull/90740

The hexagon-copy-hoisting.mir test fails when run with -verify-machineinstrs. This patch fixes this by disabling tracksRegLiveness.

>From 0f69764e7374883e306d8ee36bde6185c92b0c68 Mon Sep 17 00:00:00 2001
From: Perry MacMurray <pmacmurr at quicinc.com>
Date: Wed, 1 May 2024 08:31:46 -0700
Subject: [PATCH] [Hexagon] Fix hexagon-copy-hoisting.mir

---
 llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir b/llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir
index 0836cac7f9134f..6f2d562cbe0970 100644
--- a/llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir
+++ b/llvm/test/CodeGen/Hexagon/hexagon-copy-hoisting.mir
@@ -11,7 +11,7 @@
 
 ---
 name:            f0
-tracksRegLiveness: true
+tracksRegLiveness: false
 registers:
   - { id: 0, class: intregs, preferred-register: '' }
   - { id: 1, class: intregs, preferred-register: '' }
@@ -19,15 +19,11 @@ registers:
   - { id: 3, class: predregs, preferred-register: '' }
   - { id: 4, class: intregs, preferred-register: '' }
   - { id: 5, class: intregs, preferred-register: '' }
-liveins:
-  - { reg: '$r0', virtual-reg: '%0' }
-  - { reg: '$r1', virtual-reg: '%1' }
 stack:
   - { id: 0, offset: 0, size: 4, alignment: 8 }
 body: |
   bb.0:
     successors: %bb.1, %bb.2
-    liveins: $r0, $r1
 
     %1:intregs = COPY $r1
     %0:intregs = COPY $r0