[llvm] e83c6dd - [SLP][NFC]Add a test with the non profitable masked gather loads.

Alexey Bataev via llvm-commits llvm-commits at lists.llvm.org
Wed May 1 07:41:48 PDT 2024


Author: Alexey Bataev
Date: 2024-05-01T07:41:35-07:00
New Revision: e83c6ddf46d088713a19d9a662ad8c30d5cd207d

URL: https://github.com/llvm/llvm-project/commit/e83c6ddf46d088713a19d9a662ad8c30d5cd207d
DIFF: https://github.com/llvm/llvm-project/commit/e83c6ddf46d088713a19d9a662ad8c30d5cd207d.diff

LOG: [SLP][NFC]Add a test with the non profitable masked gather loads.

Added: 
    llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll
new file mode 100644
index 00000000000000..05c3151fca543a
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/combined-loads-stored.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux -mattr=+v < %s | FileCheck %s
+
+define void @test(ptr noalias %p, ptr %p1) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr noalias [[P:%.*]], ptr [[P1:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:    [[GEP799:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 16
+; CHECK-NEXT:    [[L3:%.*]] = load i16, ptr [[GEP799]], align 2
+; CHECK-NEXT:    [[GEP3:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 18
+; CHECK-NEXT:    [[L4:%.*]] = load i16, ptr [[GEP3]], align 2
+; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x i16>, ptr [[P]], align 2
+; CHECK-NEXT:    store <2 x i16> [[TMP1]], ptr [[P1]], align 2
+; CHECK-NEXT:    [[GEPS2:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 4
+; CHECK-NEXT:    store i16 [[L3]], ptr [[GEPS2]], align 2
+; CHECK-NEXT:    [[GEPS3:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 6
+; CHECK-NEXT:    store i16 [[L4]], ptr [[GEPS3]], align 2
+; CHECK-NEXT:    ret void
+;
+  %l1 = load i16, ptr %p, align 2
+  %gep1 = getelementptr inbounds i8, ptr %p, i64 2
+  %l2 = load i16, ptr %gep1, align 2
+  %gep2 = getelementptr inbounds i8, ptr %p, i64 16
+  %l3 = load i16, ptr %gep2, align 2
+  %gep3 = getelementptr inbounds i8, ptr %p, i64 18
+  %l4 = load i16, ptr %gep3, align 2
+  store i16 %l1, ptr %p1, align 2
+  %geps1 = getelementptr inbounds i8, ptr %p1, i64 2
+  store i16 %l2, ptr %geps1, align 2
+  %geps2 = getelementptr inbounds i8, ptr %p1, i64 4
+  store i16 %l3, ptr %geps2, align 2
+  %geps3 = getelementptr inbounds i8, ptr %p1, i64 6
+  store i16 %l4, ptr %geps3, align 2
+  ret void
+}
+


        


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