[llvm] [DAG][AArch64] Handle vscale addressing modes in reassociationCanBreakAddressingModePattern (PR #89908)

[David Green via llvm-commits]

davemgreen wrote:

I've added some negative tests and attempted to extend this to handle them well. In the long run we will want to do the opposite transform too where we combine towards legal addressing modes, which might involve more changes.

https://github.com/llvm/llvm-project/pull/89908