[llvm] 14b66fe - [AArch64][MC]Add diagnostic message for Multiple of 2/4 for ZPR128 (#90600)

[via llvm-commits]

Author: CarolineConcatto
Date: 2024-05-01T08:39:59+01:00
New Revision: 14b66fe5f36aaad627baa7f624a4997a7956d51a

URL: https://github.com/llvm/llvm-project/commit/14b66fe5f36aaad627baa7f624a4997a7956d51a
DIFF: https://github.com/llvm/llvm-project/commit/14b66fe5f36aaad627baa7f624a4997a7956d51a.diff

LOG: [AArch64][MC]Add diagnostic message for Multiple of 2/4 for ZPR128 (#90600)

This patch fix the crash reported in:
https://github.com/llvm/llvm-project/issues/90589

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    llvm/test/MC/AArch64/SME2/zip-diagnostics.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index a3b966aa61550c..c9bba9bf63142c 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -6136,6 +6136,7 @@ bool AArch64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode,
   case Match_InvalidSVEVectorListMul2x16:
   case Match_InvalidSVEVectorListMul2x32:
   case Match_InvalidSVEVectorListMul2x64:
+  case Match_InvalidSVEVectorListMul2x128:
     return Error(Loc, "Invalid vector list, expected list with 2 consecutive "
                       "SVE vectors, where the first vector is a multiple of 2 "
                       "and with matching element types");
@@ -6143,6 +6144,7 @@ bool AArch64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode,
   case Match_InvalidSVEVectorListMul4x16:
   case Match_InvalidSVEVectorListMul4x32:
   case Match_InvalidSVEVectorListMul4x64:
+  case Match_InvalidSVEVectorListMul4x128:
     return Error(Loc, "Invalid vector list, expected list with 4 consecutive "
                       "SVE vectors, where the first vector is a multiple of 4 "
                       "and with matching element types");
@@ -6739,10 +6741,12 @@ bool AArch64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
   case Match_InvalidSVEVectorListMul2x16:
   case Match_InvalidSVEVectorListMul2x32:
   case Match_InvalidSVEVectorListMul2x64:
+  case Match_InvalidSVEVectorListMul2x128:
   case Match_InvalidSVEVectorListMul4x8:
   case Match_InvalidSVEVectorListMul4x16:
   case Match_InvalidSVEVectorListMul4x32:
   case Match_InvalidSVEVectorListMul4x64:
+  case Match_InvalidSVEVectorListMul4x128:
   case Match_InvalidSVEVectorListStrided2x8:
   case Match_InvalidSVEVectorListStrided2x16:
   case Match_InvalidSVEVectorListStrided2x32:

diff  --git a/llvm/test/MC/AArch64/SME2/zip-diagnostics.s b/llvm/test/MC/AArch64/SME2/zip-diagnostics.s
index 6c80096ab48650..fbe07a4fca5dd2 100644
--- a/llvm/test/MC/AArch64/SME2/zip-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2/zip-diagnostics.s
@@ -23,3 +23,12 @@ zip {z20.b-z23.b}, {z9.b-z12.b}
 // CHECK-NEXT: zip {z20.b-z23.b}, {z9.b-z12.b}
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 
+zip {z1.q-z2.q}, z0.q, z0.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
+// CHECK-NEXT: zip {z1.q-z2.q}, z0.q, z0.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+zip {z1.q-z4.q}, z0.q, z0.q
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
+// CHECK-NEXT: zip {z1.q-z4.q}, z0.q, z0.q
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: